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45nm
Per the International Technology Roadmap for Semiconductors, the 45 nm process is a MOSFET technology node referring to the average half-pitch of a memory cell manufactured at around the 2007–2008 time frame. Matsushita and Intel started mass-producing 45 nm chips in late 2007, and AMD started production of 45 nm chips in late 2008, while IBM, Infineon, Samsung, and Chartered Semiconductor have already completed a common 45 nm process platform. At the end of 2008, SMIC was the first China-based semiconductor company to move to 45 nm, having licensed the bulk 45 nm process from IBM. In 2008, TSMC moved on to a 40nm process. Many critical feature sizes are smaller than the wavelength of light used for lithography (i.e., 193 nm and 248 nm). A variety of techniques, such as larger lenses, are used to make sub-wavelength features. Double patterning has also been introduced to assist in shrinking distances between features, especially if dry lith ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Double Patterning
Multiple patterning (or multi-patterning) is a class of technologies for manufacturing integrated circuits (ICs), developed for photolithography to enhance the feature density. It is expected to be necessary for the 10 nm and 7 nm node semiconductor processes and beyond. The premise is that a single lithographic exposure may not be enough to provide sufficient resolution. Hence additional exposures would be needed, or else positioning patterns using etched feature sidewalls (using spacers) would be necessary. Even with single exposure having sufficient resolution, extra masks have been implemented for better patterning quality such as by Intel for line-cutting at its 45nm node or TSMC at its 28nm node. Even for electron-beam lithography, single exposure appears insufficient at ~10 nm half-pitch, hence requiring double patterning. Double patterning lithography was first demonstrated in 1983 by D.C. Flanders and N.N. Efremow. Since then several double patterning tech ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MOSFET
The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is a type of field-effect transistor (FET), most commonly fabricated by the controlled oxidation of silicon. It has an insulated gate, the voltage of which determines the conductivity of the device. This ability to change conductivity with the amount of applied voltage can be used for amplifying or switching electronic signals. A metal-insulator-semiconductor field-effect transistor (MISFET) is a term almost synonymous with MOSFET. Another synonym is IGFET for insulated-gate field-effect transistor. The basic principle of the field-effect transistor was first patented by Julius Edgar Lilienfeld in 1925.Lilienfeld, Julius Edgar (1926-10-08) "Method and apparatus for controlling electric currents" upright=1.6, Two power MOSFETs in watt.html" ;"title="amperes">A in the ''on'' state, dissipating up to about 100 watt">W and controlling a load of over 2000 W. A matchstick is pictured ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
High-κ Dielectric
The term high-κ dielectric refers to a material with a high dielectric constant (κ, kappa), as compared to silicon dioxide. High-κ dielectrics are used in semiconductor manufacturing processes where they are usually used to replace a silicon dioxide gate dielectric or another dielectric layer of a device. The implementation of high-κ gate dielectrics is one of several strategies developed to allow further miniaturization of microelectronic components, colloquially referred to as extending Moore's Law. Sometimes these materials are called "high-k" (pronounced "high kay"), instead of "high-κ" (high kappa). Need for high-κ materials Silicon dioxide () has been used as a gate oxide material for decades. As metal-oxide-semiconductor field-effect transistors (MOSFETs) have decreased in size, the thickness of the silicon dioxide gate dielectric has steadily decreased to increase the gate capacitance (per unit area) and thereby drive current (per device width), raising device pe ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Advanced Micro Devices
Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactured its own processors, the company later outsourced its manufacturing, a practice known as going fabless, after GlobalFoundries was spun off in 2009. AMD's main products include microprocessors, motherboard chipsets, embedded processors, graphics processors, and FPGAs for servers, workstations, personal computers, and embedded system applications. History First twelve years Advanced Micro Devices was formally incorporated by Jerry Sanders, along with seven of his colleagues from Fairchild Semiconductor, on May 1, 1969. Sanders, an electrical engineer who was the director of marketing at Fairchild, had, like many Fairchild executives, grown frustrated with the increasing lack of support, opportunity, and flexibility wi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SSE4
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; more precise details of 47 instructions became available at the Spring 2007 Intel Developer Forum in Beijing, in the presentation. SSE4 is fully compatible with software written for previous generations of Intel 64 and IA-32 architecture microprocessors. All existing software continues to run correctly without modification on microprocessors that incorporate SSE4, as well as in the presence of existing and new applications that incorporate SSE4. SSE4 subsets Intel SSE4 consists of 54 instructions. A subset consisting of 47 instructions, referred to as ''SSE4.1'' in some Intel documentation, is available in Penryn. Additionally, ''SSE4.2'', a second subset consisting of the 7 remaining instructions, is first available in Nehalem-based Core ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Xeon
Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus. Overview The ''Xeon'' brand has been ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System-on-a-chip
A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory interfaces, on-chip input/output devices, input/output interfaces, and secondary storage interfaces, often alongside other components such as radio modems and a graphics processing unit (GPU) – all on a single substrate or microchip. It may contain digital, analog, mixed-signal, and often radio frequency signal processing functions (otherwise it is considered only an application processor). Higher-performance SoCs are often paired with dedicated and physically separate memory and secondary storage (such as LPDDR and eUFS or eMMC, respectively) chips, that may be layered on top of the SoC in what's known as a package on package (PoP) configuration, or be placed close to the SoC. Additionally, SoCs may use separate wireless mo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Matsushita Electric Industrial Co
Matsushita (written: lit. "below the pine tree") is a Japanese surname. Notable people with the surname include: *Daisuke Matsushita (born 1981), a former Japanese football player *Hiro Matsushita (born 1961), former Japanese Champ Car racing driver, businessman and grandson of Konosuke Matsushita. Chairman of Swift Engineering & Swift Xi *, Japanese handball player *Ko Matsushita, a Japanese conductor and composer * Kohei Matsushita (born 1985), a Japanese football (soccer) player currently playing for Ehime F.C. * Konosuke Matsushita (1894–1989), a Japanese industrialist and founder of Matsushita Electric Industrial Co., Ltd., now known as Panasonic Corporation *Masaharu Matsushita (1912–2012), a Japanese businessman, the second president of Matsushita Electric, and son-in-law of Konosuke Matsushita *Miyuki Matsushita (born 1969), a Japanese voice actress *Moeko Matsushita (born 1982), a Japanese singer and actress *Nao Matsushita (born 1985), a Japanese actress and piani ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Immersion Lithography
Immersion lithography is a photolithography resolution enhancement technique for manufacturing integrated circuits (ICs) that replaces the usual air gap between the final lens and the wafer surface with a liquid medium that has a refractive index greater than one. The resolution is increased by a factor equal to the refractive index of the liquid. Current immersion lithography tools use highly purified water for this liquid, achieving feature sizes below 45 nanometers. ASML and Nikon are currently the only manufacturers of immersion lithography systems. History The idea for immersion lithography was patented in 1984 by Takanashi et al. It was also proposed by Taiwanese engineer Burn J. Lin and realized in the 1980s. In 2004, IBM's director of silicon technology, Ghavam Shahidi, announced that IBM planned to commercialize lithography based on light filtered through water. Immersion lithography is now being extended to sub-20nm nodes through the use of multiple patterning. Back ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
22 Nm Process
The 22 nm node is the process step following 32 nm in CMOS MOSFET semiconductor device fabrication. The typical half-pitch (i.e., half the distance between identical features in an array) for a memory cell using the process is around 22 nm. It was first demonstrated by semiconductor companies for use in RAM memory in 2008. In 2010, Toshiba began shipping 24 nm flash memory chips, and Samsung Electronics began mass-producing 20 nm flash memory chips. The first consumer-level CPU deliveries using a 22 nm process started in April 2012 with the Intel Ivy Bridge processors. The ITRS 2006 Front End Process Update indicates that equivalent physical oxide thickness will not scale below 0.5 nm (about twice the diameter of a silicon atom), which is the expected value at the 22 nm node. This is an indication that CMOS scaling in this area has reached a wall at this point, possibly disturbing Moore's law. The 20-nanometre node is an intermediate half-n ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
32 Nm Process
The 32 nm node is the step following the 45 nm process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch (i.e., half the distance between identical features) of a memory cell at this technology level. Toshiba produced commercial 32 GiB NAND flash memory chips with the 32nm process in 2009. Intel and AMD produced commercial microchips using the 32-nanometre process in the early 2010s. IBM and the Common Platform also developed a 32 nm high-κ metal gate process. Intel began selling its first 32 nm processors using the Westmere architecture on 7 January 2010. The 28-nanometre node was an intermediate half-node die shrink based on the 32-nanometre process. The 32 nm process was superseded by commercial 22 nm technology in 2012. [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Samsung Electronics
Samsung Electronics Co., Ltd. (, sometimes shortened to SEC and stylized as SΛMSUNG) is a South Korean multinational electronics corporation headquartered in Yeongtong-gu, Suwon, South Korea. It is the pinnacle of the Samsung chaebol, accounting for 70% of the group's revenue in 2012. Samsung Electronics has played a key role in the group's corporate governance due to circular ownership. Samsung Electronics has assembly plants and sales networks in 74 countries and employs around 290,000 people. It is majority-owned by foreign investors. Samsung Electronics is the world's second-largest technology company by revenue, and its market capitalization stood at US$520.65 billion, the 12th largest in the world. Samsung is a major manufacturer of Electronic Components such as lithium-ion batteries, semiconductors, image sensors, camera modules, and displays for clients such as Apple, Sony, HTC, and Nokia. It is the world's largest manufacturer of mobile phones an ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
