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WD16
The WD16 is a 16-bit microprocessor introduced by Western Digital in October 1976. It is based on the MCP-1600 chipset, a general-purpose design that was also used to implement the DEC LSI-11 low-end minicomputer and the Pascal MicroEngine processor. The three systems differed primarily in their microcode, giving each system a unique instruction set architecture (ISA). The WD16 implements an extension of the PDP-11 instruction set architecture but is not machine code compatible with the PDP-11. The instruction set and microcoding were created by Dick Wilcox and Rich Notari. The WD16 is an example of orthogonal CISC architecture. Most two-operand instructions can operate memory-to-memory with any addressing mode and some instructions can result in up to ten memory accesses. The WD16 is implemented in five 40-pin DIP packages. Maximum clock speed is 3.3 MHz. Its interface to memory is via a 16-bit multiplexed data/address bus. The WD16 is best known for its use in Alpha M ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MCP-1600
The MCP-1600 is a multi-chip 16-bit microprocessor introduced by Western Digital in 1975 and produced through the early 1980s. Used in the Pascal MicroEngine, the WD16 processor in the Alpha Microsystems AM-100, and the DEC LSI-11 microcomputer, a cost-reduced and compact implementation of the DEC PDP-11. Description There are three types of chips in the chip-set: * CP1611 RALU - Register ALU chip * CP1621 CON - Control chip * CP1631 MICROM - Mask-programmed microcode ROM chip (512 – 22 bit words) The chips use a 3.3MHz four phase clock and three power supply voltages (+5V, +12V, and -5V), as required by the N-channel silicon gate process then available at Western Digital. Internally the MCP-1600 is a (relatively fast) 8-bit processor that can be micro-programmed to emulate a 16-bit CPU. All byte operations execute in one clock period; word operations and branches take two clocks. Up to four MICROMs are supported, but usually two or three could hold the neede ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Alpha Microsystems
Alpha Microsystems, Inc., often shortened to Alpha Micro, was an American computer company founded in 1977 in Costa Mesa, California, by John French, Dick Wilcox and Bob Hitchcock. During the dot-com bubble, dot-com boom, the company changed its name to AlphaServ, then NQL Inc., reflecting its pivot toward being a provider of Internet software. However, the company soon reverted to its original Alpha Microsystems name after the dot-com bubble burst. Products The first Alpha Micro computer was the S-100 bus, S-100 AM-100, based upon the WD16 microprocessor chipset from Western Digital. In April 1978, the two-board AM-100 was offered at $1,495 (). As of 1982, AM-100/L and the AM-1000 were based on the Motorola Motorola 68000, 68000 and succeeding processors, though Alpha Micro swapped several addressing lines to create byte-ordering compatibility with their earlier processor. Early peripherals included standard computer terminals (such models as Soroc, Hazeltine Corporation, H ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Western Digital
Western Digital Corporation is an American data storage company headquartered in San Jose, California. Established in 1970, the company is one of the world's largest manufacturers of hard disk drives (HDDs). History 1970s Western Digital was founded on April 23, 1970, by Alvin B. Phillips, a Motorola employee, as General Digital Corporation, initially a manufacturer of MOS test equipment. It was originally based in Newport Beach, California, shortly thereafter moving to Santa Ana, California, and would go on to become one of the largest technology firms headquartered in Orange County. It rapidly became a specialty semiconductor maker, with start-up capital provided by several individual investors and industrial giant Emerson Electric. Around July 1971, it adopted its current name and soon introduced its first product, the ''WD1402A'' UART. During the early 1970s, the company focused on making and selling calculator chips, and by 1975, Western Digital was the largest ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pascal MicroEngine
Pascal MicroEngine is a series of microcomputer products manufactured by Western Digital from 1979 through the mid-1980s, designed specifically to run the UCSD p-System efficiently. Compared to other microcomputers, which use a machine language p-code interpreter, the Pascal MicroEngine has its interpreter implemented in microcode; p-code is its machine language. The most common programming language used on the p-System is Pascal. The MicroEngine runs a special release III p-System. The enhancements of release III were incorporated into release IV which was made publicly available for other platforms but not for the MicroEngine. Products The MicroEngine series of products was offered at various levels of integration: * WD-9000 five chip microprocessor chip set * WD-900 single board computer * WD-90 packaged system * SB-1600 MicroEngine single board computer * ME-1600 Modular MicroEngine packaged system The MicroEngine chipset was based on the MCP-1600 chipset, which formed the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Microcode
In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. It consists of a set of hardware-level instructions that implement the higher-level machine code instructions or control internal finite-state machine sequencing in many digital processing components. While microcode is utilized in Intel and AMD general-purpose CPUs in contemporary desktops and laptops, it functions only as a fallback path for scenarios that the faster hardwired control unit is unable to manage. Housed in special high-speed memory, microcode translates machine instructions, state machine data, or other input into sequences of detailed circuit-level operations. It separates the machine instructions from the underlying electronics, thereby enabling greater flexibility in designing and altering instructions. Moreover, it facilitates the construction of complex multi-step inst ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PDP-11 Architecture
The PDP-11 architecture is a 16-bit CISC instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). It is implemented by central processing units (CPUs) and microprocessors used in PDP-11 minicomputers. It was in wide use during the 1970s, but was eventually overshadowed by the more powerful VAX architecture in the 1980s. CPU registers The CPU contains eight general-purpose 16-bit registers (R0 to R7). Register R7 is the program counter (PC). Although any register can be used as a stack pointer, R6 is the stack pointer (SP) used for hardware interrupts and traps. R5 is often used to point to the current procedure call frame. To speed up context switching, some PDP-11 models provide dual R0-R5 register sets. Kernel, Supervisor (where present), and User modes have separate memory maps, and also separate stack pointers (so that a user program cannot cause the system to malfunction by storing an invalid value in the stack pointer register). Memory Data ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Processor Register
A processor register is a quickly accessible location available to a computer's processor. Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. In computer architecture, registers are typically addressed by mechanisms other than main memory, but may in some cases be assigned a memory address e.g. DEC PDP-10, ICT 1900. Almost all computers, whether load/store architecture or not, load items of data from a larger memory into registers where they are used for arithmetic operations, bitwise operations, and other operations, and are manipulated or tested by machine instructions. Manipulated items are then often stored back to main memory, either by the same instruction or by a subsequent one. Modern processors use either static or dynamic random-access memory (RAM) as main memory, with the latter usually accessed via one or more cache levels. Processor registers are normal ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Program Counter
The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is a processor register that indicates where a computer is in its program sequence. Usually, the PC is incremented after fetching an instruction, and holds the memory address of (" points to") the next instruction that would be executed. Processors usually fetch instructions sequentially from memory, but ''control transfer'' instructions change the sequence by placing a new value in the PC. These include branches (sometimes called jumps), subroutine calls, and returns. A transfer that is conditional on the truth of some assertion lets the computer follow a different sequence under different conditions. A branch provides that the next instruction is fetched from elsewhere in memory. A subroutine call not only branches but saves the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Byte
The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit of memory in many computer architectures. To disambiguate arbitrarily sized bytes from the common 8-bit definition, network protocol documents such as the Internet Protocol () refer to an 8-bit byte as an octet. Those bits in an octet are usually counted with numbering from 0 to 7 or 7 to 0 depending on the bit endianness. The size of the byte has historically been hardware-dependent and no definitive standards existed that mandated the size. Sizes from 1 to 48 bits have been used. The six-bit character code was an often-used implementation in early encoding systems, and computers using six-bit and nine-bit bytes were common in the 1960s. These systems often had memory words of 12, 18, 24, 30, 36, 48, or 60 bits, corresponding t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Word (computer Architecture)
In computing, a word is any processor design's natural unit of data. A word is a fixed-sized datum handled as a unit by the instruction set or the hardware of the processor. The number of bits or digits in a word (the ''word size'', ''word width'', or ''word length'') is an important characteristic of any specific processor design or computer architecture. The size of a word is reflected in many aspects of a computer's structure and operation; the majority of the registers in a processor are usually word-sized and the largest datum that can be transferred to and from the working memory in a single operation is a word in many (not all) architectures. The largest possible address size, used to designate a location in memory, is typically a hardware word (here, "hardware word" means the full-sized natural word of the processor, as opposed to any other definition used). Documentation for older computers with fixed word size commonly states memory sizes in words rather than bytes ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Endianness
file:Gullivers_travels.jpg, ''Gulliver's Travels'' by Jonathan Swift, the novel from which the term was coined In computing, endianness is the order in which bytes within a word (data type), word of digital data are transmitted over a data communication medium or Memory_address, addressed (by rising addresses) in computer memory, counting only byte Bit_numbering#Bit significance and indexing, significance compared to earliness. Endianness is primarily expressed as big-endian (BE) or little-endian (LE), terms introduced by Danny Cohen (computer scientist), Danny Cohen into computer science for data ordering in an Internet Experiment Note published in 1980. Also published at The adjective ''endian'' has its origin in the writings of 18th century Anglo-Irish writer Jonathan Swift. In the 1726 novel ''Gulliver's Travels'', he portrays the conflict between sects of Lilliputians divided into those breaking the shell of a boiled egg from the big end or from the little end. By analogy, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Floating-point Arithmetic
In computing, floating-point arithmetic (FP) is arithmetic on subsets of real numbers formed by a ''significand'' (a Sign (mathematics), signed sequence of a fixed number of digits in some Radix, base) multiplied by an integer power of that base. Numbers of this form are called floating-point numbers. For example, the number 2469/200 is a floating-point number in base ten with five digits: 2469/200 = 12.345 = \! \underbrace_\text \! \times \! \underbrace_\text\!\!\!\!\!\!\!\overbrace^ However, 7716/625 = 12.3456 is not a floating-point number in base ten with five digits—it needs six digits. The nearest floating-point number with only five digits is 12.346. And 1/3 = 0.3333… is not a floating-point number in base ten with any finite number of digits. In practice, most floating-point systems use Binary number, base two, though base ten (decimal floating point) is also common. Floating-point arithmetic operations, such as addition and division, approximate the correspond ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
