The Efficeon processor is Transmeta's second-generation

256-bit There are currently no mainstream general-purpose processors built to operate on 256-bit integers or addresses, though a number of processors do operate on 256-bit data. Representation A 256-bit register can store 2256 different values. The range ...

VLIW design released in 2004 which employs a software engine

Code Morphing Software Transmeta Corporation was an American fabless semiconductor company based in Santa Clara, California. It developed low power x86 compatible microprocessors based on a VLIW core and a software layer called Code Morphing Software. Code Morphing So ...

(CMS) to convert code written for x86 processors to the native

instruction set In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called a ...

of the chip. Like its predecessor, the

Transmeta Crusoe The Transmeta Crusoe is a family of x86-compatible microprocessors developed by Transmeta and introduced in 2000. Instead of the instruction set architecture being implemented in hardware, or translated by specialized hardware, the Crusoe runs a ...

128-bit While there are currently no mainstream general-purpose processors built to operate on 128-bit ''integers'' or addresses, a number of processors do have specialized ways to operate on 128-bit chunks of data. Representation 128-bit processors co ...

VLIW architecture), Efficeon stresses computational efficiency, low power consumption, and a low thermal footprint.

Processor

Efficeon most closely mirrors the feature set of

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the devel ...

Pentium 4 Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 2000 ...

processors, although, like AMD

Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sled ...

processors, it supports a fully integrated

memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an in ...

, a

HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high- bandwidth, low- latency point-to-point link that was introduced on Apri ...

IO bus, and the

NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...

, or no-execute x86 extension to PAE mode.

support is available starting with CMS version 6.0.4. Efficeon's computational performance relative to mobile CPUs like the

Pentium M The Pentium M is a family of mobile 32-bit single-core x86 microprocessors (with the modified Intel P6 (microarchitecture), P6 microarchitecture) introduced in March 2003 and forming a part of the Intel Centrino#Carmel platform (2003), Carmel no ...

is thought to be lower, although little appears to be published about the relative performance of these competing processors. Efficeon came in two package types: a 783- and a 592-contact

ball grid array A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put ...

(BGA). Its power consumption is moderate (with some consuming as little as 3 watts at 1 GHz and 7 watts at 1.5 GHz), so it can be passively cooled. Two generations of this chip were produced. The first generation (TM8600) was manufactured using a

TSMC Taiwan Semiconductor Manufacturing Company Limited (TSMC; also called Taiwan Semiconductor) is a Taiwanese multinational semiconductor contract manufacturing and design company. It is the world's most valuable semiconductor company, the world' ...

0.13 micrometre process and produced at speeds up to 1.2 GHz. The second generation (TM8800 and TM8820) was manufactured using a

Fujitsu is a Japanese multinational information and communications technology equipment and services corporation, established in 1935 and headquartered in Tokyo. Fujitsu is the world's sixth-largest IT services provider by annual revenue, and the la ...

90 nm process and produced at speeds ranging from 1 GHz to 1.7 GHz. Internally, the Efficeon has two

arithmetic logic unit In computing, an arithmetic logic unit (ALU) is a combinational digital circuit that performs arithmetic and bitwise operations on integer binary numbers. This is in contrast to a floating-point unit (FPU), which operates on floating point numb ...

s, two load/store/add units, two execute units, two

floating-point In computing, floating-point arithmetic (FP) is arithmetic that represents real numbers approximately, using an integer with a fixed precision, called the significand, scaled by an integer exponent of a fixed base. For example, 12.345 can be ...

/ MMX/ SSE/

SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE ins ...

units, one branch prediction unit, one alias unit, and one control unit. The VLIW core can execute a 256-bit VLIW instruction per cycle, which is called a molecule and has room to store eight 32-bit instructions (called atoms) per cycle. The Efficeon has a 128 KB L1 instruction cache, a 64 KB L1 data cache and a 1 MB L2 cache. All caches are on die. Additionally the Efficeon CMS (code morphing software) reserves a small portion of main memory (typically 32 MB) for its translation cache of dynamically translated x86 instructions.

Products

250px, 1 GHz Efficeon TM8600 used on Sharp Mebius MURAMASA / PC-MM2 *

Elitegroup Elitegroup Computer Systems Co., Ltd. (ECS; zh, t=精英電腦股份有限公司, c=, s=) is a Taiwan-based electronics firm. It is the fifth largest PC motherboard manufacturer in the world (after Asus, Gigabyte Technology, ASRock, and MSI), ...

A532 * Hewlett-Packard ThinClient T5710 *

Microsoft Microsoft Corporation is an American multinational corporation, multinational technology company, technology corporation producing Software, computer software, consumer electronics, personal computers, and related services headquartered at th ...

FlexGo ComputerMicrosoft brings Vista to developing world PCs
/ref> (first generation) * Orion Multisystem Cluster Workstation * Sharp Actius MM20, MP30, MP70G * Sharp Mebius Muramasa PC-MM2, PC-CV50F

References

{{reflist

External links

Transmeta Microprocessor TechnologyEfficeon TM8600 Product SheetEfficeon TM8300/8600 Product BriefEfficeon TM8800 Product Sheet
Embedded microprocessors Very long instruction word computing X86 microprocessors VLIW microprocessors X86 microarchitectures