electronic design automation Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing Electronics, electronic systems such as integrated circuits and printed circuit boards. The tools wo ...

, parasitic extraction is the calculation of the parasitic effects in both the designed devices and the required wiring

interconnect In telecommunications, interconnection is the physical linking of a carrier's network with equipment or facilities not belonging to that network. The term may refer to a connection between a carrier's facilities and the equipment belonging to its ...

s of an

electronic circuit An electronic circuit is composed of individual electronic components, such as resistors, transistors, capacitors, inductors and diodes, connected by conductive wires or Conductive trace, traces through which electric current can flow. It is a t ...

parasitic capacitance Parasitic capacitance or stray capacitance is the unavoidable and usually unwanted capacitance that exists between the parts of an electronic component or circuit simply because of their proximity to each other. When two electrical conductors a ...

s, parasitic resistances and

parasitic inductance In electrical networks, a parasitic impedance is a circuit element ( resistance, inductance or capacitance) which is not desirable in an electrical component for its intended purpose. For instance, a resistor is designed to possess resistance, ...

s, commonly called parasitic devices, parasitic components, or simply parasitics. The major purpose of parasitic extraction is to create an accurate analog model of the circuit, so that detailed simulations can emulate actual digital and analog circuit responses. Digital circuit responses are often used to populate databases for signal delay and loading calculation such as: timing analysis; power analysis; circuit simulation; and

signal integrity Signal integrity or SI is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is represented by a voltage (or current) waveform. However, digital signals are fundamentally analog signal, anal ...

analysis. Analog circuits are often run in detailed test benches to indicate if the extra extracted parasitics will still allow the designed circuit to function.

Background

In early

integrated circuit An integrated circuit (IC), also known as a microchip or simply chip, is a set of electronic circuits, consisting of various electronic components (such as transistors, resistors, and capacitors) and their interconnections. These components a ...

s the impact of the wiring was negligible, and wires were not considered as electrical elements of the circuit. However below the 0.5-

micrometre The micrometre (English in the Commonwealth of Nations, Commonwealth English as used by the International Bureau of Weights and Measures; SI symbol: μm) or micrometer (American English), also commonly known by the non-SI term micron, is a uni ...

technology node Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories (such as RAM and flash memory). It is a multiple-step photolit ...

resistance and capacitance of the interconnects started making a significant impact on circuit performance. With shrinking

process A process is a series or set of activities that interact to produce a result; it may occur once-only or be recurrent or periodic. Things called a process include: Business and management * Business process, activities that produce a specific s ...

technologies inductance effects of interconnects became important as well. Major effects of interconnect parasitics include: signal delay,

signal noise In electronics, noise is an unwanted disturbance in an electrical signal. Noise generated by electronic devices varies greatly as it is produced by several different effects. In particular, noise is inherent in physics and central to thermod ...

, IR drop (resistive component of voltage).

Interconnect capacitance extraction

Interconnect capacitance is calculated by giving the extraction tool the following information: the top view layout of the design in the form of input polygons on a set of layers; a mapping to a set of devices and pins (from a Layout Versus Schematic run), and a cross sectional understanding of these layers. This information is used to create a set of layout wires that have added capacitors where the input polygons and cross sectional structure indicate. The output netlist contains the same set of input nets as the input design netlist and adds parasitic capacitor devices between these nets.

Interconnect resistance extraction

Interconnect resistance is calculated by giving the extraction tool the following information: the top view layout of the design in the form of input polygons on a set of layers; a mapping to a set of devices and pins (from a Layout Versus Schematic run), and a cross sectional understanding of these layers including the resistivity of the layers. This information is used to create a set of layout sub.wires that have added resistance between various sub-parts of the wires. The above Interconnect Capacitance is divided and shared amongst the sub-nodes in a proportional way. Note that unlike Interconnect Capacitance, Interconnect Resistance needs to add sub-nodes between the circuit elements to place these parasitic resistors. This can greatly increase the size of the extracted output netlist and can cause additional simulation problems.

Interconnect inductance extraction

Tools and vendors

The tools fall into the following broad categories. * Field solvers provide physically accurate solutions. They calculate electromagnetic parameters by directly solving

Maxwell's equations Maxwell's equations, or Maxwell–Heaviside equations, are a set of coupled partial differential equations that, together with the Lorentz force law, form the foundation of classical electromagnetism, classical optics, Electrical network, electr ...

. Due to high calculation burden they are applicable only very small designs or to parts of the designs. *Approximate solutions with pattern matching techniques are the only feasible approach to extract parasitics for complete modern integrated circuit designs.

ANSYS Q3D Extractor

ANSYS Q3D Extractor uses method of moments (integral equations) and FEMs to compute capacitive, conductance, inductance and resistance matrices. It uses the fast multipole method (FMM) to accelerate the solution of the integral equations. Outputs from the solver include current and voltage distributions, CG and RL matrices.

FastCap, FastHenry

FastCap and FastHenry, from

MIT The Massachusetts Institute of Technology (MIT) is a private research university in Cambridge, Massachusetts, United States. Established in 1861, MIT has played a significant role in the development of many areas of modern technology and sc ...

, are two free parasitics extractor tools for capacitance, inductance, and resistance. Quoted in many scientific articles, they are considered golden references in their field. Source code and Windows binary versions with viewer and editor are freely available fro
FastFieldSolvers

StarRC

StarRC from

Synopsys Synopsys, Inc. is an American electronic design automation (EDA) company headquartered in Sunnyvale, California, that focuses on silicon design and verification, silicon intellectual property and software security and quality. Synopsys sup ...

(previously from Avanti) is a universal parasitics extractor tool applicable for a full range of electronic designs.

Quantus

Quantus from

Cadence In Classical music, Western musical theory, a cadence () is the end of a Phrase (music), phrase in which the melody or harmony creates a sense of full or partial resolution (music), resolution, especially in music of the 16th century onwards.Don ...

is a parasitic extractor tool for both digital and analog designs and parasitics extraction check have to be carried out to prepare the design for postlayout verification.

QuickCap

QuickCap NX from

is a parasitic extractor tool for both digital and analog designs. It was based on QuickCap developed by Ralph Iverson of Random Logic Corporation, which was acquired by Magma and Synopsys.

Calibre xACT3D

Calibre xACT3D from

Mentor Graphics Mentor Graphics Corporation was a US-based electronic design automation (EDA) multinational corporation for electrical engineering and electronics, headquartered in Wilsonville, Oregon. Founded in 1981, the company distributed products that ass ...

is a parasitic extractor tool for both digital and analog designs.Calibre xACT3D
/ref> It was based on PexRC developed by Wangqi Qiu and Weiping Shi of Pextra Corporation, which was acquired by Mentor.

References

{{DEFAULTSORT:Parasitic Extraction Electronic circuit verification