HOME

TheInfoList



OR:

The Eden microprocessors from
VIA Technologies VIA Technologies, Inc. () is a Taiwanese manufacturer of integrated circuits, mainly motherboard chipsets, CPUs, and memory. It was once the world's largest independent manufacturer of motherboard chipsets. As a fabless semiconductor company, ...
are fifth- and sixth-generation CPUs targeted at the embedded market.


Embedded processors


Eden ESP


"Samuel 2" (150 nm)

* All models support: '' MMX,
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of float ...
''


"Nehemiah" (130 nm)

* All models support: '' MMX, SSE, VIA PadLock (AES, RNG)''


Eden-N


"Nehemiah" (130 nm)

* All models support: '' MMX, SSE, VIA PadLock (AES, RNG)'' * VIA PowerSaver supported


Eden


"Esther" (standard-voltage, 90 nm)

* All models support: '' MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
NX bit The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
, VIA PadLock (SHA, AES, Montgomery Multiplier, RNG)'' * VIA PowerSaver supported with up to 8
ACPI Advanced Configuration and Power Interface (ACPI) is an open standard that operating systems can use to discover and configure computer hardware components, to perform power management (e.g. putting unused hardware components to sleep), auto con ...
P-states * Idle power 500 mW


"Esther" (ultra-low-voltage, 90 nm)

* All models support: '' MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
NX bit The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
, VIA PadLock (SHA, AES, Montgomery Multiplier, RNG)'' * VIA PowerSaver supported with up to 8
ACPI Advanced Configuration and Power Interface (ACPI) is an open standard that operating systems can use to discover and configure computer hardware components, to perform power management (e.g. putting unused hardware components to sleep), auto con ...
P-states


Eden X2


"Eden X2" (40 nm)

* All models support: '' MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
x86-64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit extension of the x86 instruction set architecture, instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduces two new ope ...
,
NX bit The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
x86 virtualization x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware ...
, VIA PadLock (SHA, AES, Montgomery Multiplier, RNG)'' * VIA Eden X2 U4200 supports SSE4.


Eden C


"Eden C" (28 nm)

* All models support: '' MMX, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
SSSE3 Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitect ...
, SSE4.1, SSE4.2, AVX,
AVX2 Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...
,
x86-64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit extension of the x86 instruction set architecture, instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduces two new ope ...
,
NX bit The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
VT-x x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
, VIA PadLock (SHA, AES, RNG)'', VIA PowerSaver Announced on 13 August 2015 was a VIA embedded PC using a 1.2 GHz VIA Eden X4 5000-series CPU.
Article

Forum Post with Photo

Forum Post with CPU-Z reporting SSE4.2, AVX & AVX2 support
– appears to also report
AES-NI An Advanced Encryption Standard instruction set (AES instruction set) is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern proces ...


References


External links


VIA Eden product page

VIA Processor specification comparison


See also

*
List of VIA microprocessors This article lists x86-compliant microprocessors sold by VIA Technologies, grouped by technical merits: cores within same group have much in common. Cyrix design ( Cyrix III) * All models support: '' MMX, 3DNow!'' Centaur Technology design ...
{{VIA *Eden VIA