The following is a list of Intel Core

processors Processor may refer to: Computing Hardware * Processor (computing) ** Central processing unit (CPU), the hardware within a computer that executes a program *** Microprocessor, a central processing unit contained on a single integrated circuit ( ...

. This includes

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and Delaware General Corporation Law, incorporated in Delaware. Intel designs, manufactures, and sells computer compo ...

's original Core (Solo/Duo) mobile series based on the Enhanced Pentium M

microarchitecture In electronics, computer science and computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as μarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular ...

, as well as its Core 2- (Solo/Duo/Quad/Extreme), Core i3-, Core i5-, Core i7-, Core i9-, Core M- (m3/m5/m7/m9), Core 3-, Core 5-, and Core 7- Core 9-, branded processors.

Desktop processors

Core 2

"Allendale" (65 nm, 800
MT/s In computer technology, transfers per second and its more common secondary terms gigatransfers per second (abbreviated as GT/s) and megatransfers per second (MT/s) are informal language that refer to the number of operations transferring data that ...
)

*All models support: '' MMX, SSE,

SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...

SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...

SSSE3 Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitect ...

, Enhanced Intel

SpeedStep Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel's microprocessors that allow the clock speed of the processor to be ...

Technology (EIST),

Intel 64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit extension of the x86 instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduces two new operating modes: 64-bit mode an ...

, XD bit (an

NX bit The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...

implementation),

Intel Active Management Technology Intel Active Management Technology (AMT) is hardware and firmware for remote out-of-band management of select business computers, running on the Intel Management Engine, a microprocessor subsystem not exposed to the user, intended for monitor ...

(iAMT2)'' * Die size: 111 mm² * Steppings: L2, M0, G0 Note: The M0 and G0 Steppings have better optimizations to lower idle power consumption from 12W to 8W. Note: The E4700 uses G0 Stepping which makes it a Conroe CPU.

"Conroe" (65 nm, 1066 MT/s)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2)'' * All models support:

Intel VT-x x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...

* Die size: 143 mm² * Steppings: B2, G0 Note: of the E6000 series processors, only models E6550, E6750, and E6850 support Intel's

Trusted Execution Technology Intel Trusted Execution Technology (Intel TXT, formerly known as LaGrande Technology) is a computer hardware technology of which the primary goals are: * Attestation of the authenticity of a platform and its operating system. * Assuring that an ...

(TXT). Note: The L2 Stepping, and models with sSpec SL9ZL, SL9ZF, SLA4U, SLA4T, have better optimizations to lower idle power consumption from 22W to 12W. Note: The M0 and G0 Steppings have better optimizations to lower idle power consumption from 12W to 8W.

"Conroe" (65 nm, 1333 MT/s)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2)'' * All models support:

* All E6x50 models support:

(TXT) * Die size: 143 mm² *

Transistor count The transistor count is the number of transistors in an electronic device (typically on a single substrate or silicon die). It is the most common measure of integrated circuit complexity (although the majority of transistors in modern microproc ...

: 291 million * Steppings: B2, G0 Note: of the E6000 series processors, only models E6550, E6750, and E6850 support Intel's

"Conroe-CL" (65 nm, 1066 MT/s)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Die size: 111 mm² (Conroe) * Steppings: ?

"Conroe XE" (65 nm)

''These models feature an unlocked

clock multiplier In computing, the clock multiplier (or CPU multiplier or bus/core ratio) sets the ratio of an internal CPU clock rate to the externally supplied clock. This may be implemented with phase-locked loop (PLL) frequency multiplier circuitry. A CPU with ...

'' *All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Die size: 143 mm² * Steppings: B1, B2 * The X6900 was never publicly released.

"Kentsfield" (65 nm)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

'' * Die size: 2 ×143 mm² * Steppings: B3, G0

"Kentsfield XE" (65 nm)

''These models feature an unlocked

'' *All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

'' * Die size: 2 ×143 mm² * Steppings: B3, G0

"Wolfdale-3M" (45 nm, 1066 MT/s)

* All models support: '' MMX, SSE,

SSE4 SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper;< ...

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2)'' * Die size: 82 mm² * Transistor Count: 230 million * Steppings: M0, R0 * Models with a part number ending in "ML" instead of "M" support

"Wolfdale" (45 nm, 1333 MT/s)

*All models(except E8190) support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), iAMT2 (

Intel VT-d x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...

(TXT)'' * Die size: 107 mm² * Transistor Count: 410 million * Steppings: C0, E0 Note: The E8190 and E8290 do not support Intel VT-d. Note 2: E8700 is a very rare example in Intel's history where a model was yanked from Intel ARK without a recall notice and after a SSPEC was assigned. Working examples were seen, believed to have been released to OEM, but none was offered in retail PCs. See also: Versions of the same Wolfdale core in an LGA 771 are available under the

Dual-Core Xeon Xeon (; ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded markets. It was introduced in June 1998. Xeon processors are based on the same architect ...

brand.

"Yorkfield-6M" (45 nm)

*All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT) '' * Die size: 2 × 82 mm² * Steppings: M0, M1, R0 * All Q8xxx models are Yorkfield-6M MCMs with only 2 × 2 MB L2 cache enabled. Note: Q8200, Q8200S, Q8300 SLB5W does not support Intel VT-x. Note: Q8200, Q8200S, Q8300, Q8400, Q8400S, Q9500 does not support Intel VT-d. Note: Q8200, Q8200S, Q8300, Q8400, Q8400S does not support TXT.

Yorkfield (45 nm)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Die size: 2 × 107 mm² * The "S" suffix denotes to low power consumption specs with 65W TDP, equivalent to that of a standard Core 2 Duo. Supplied to OEM channels only and mostly seen as options for SFF platforms. The first batch of Q9550S has no "S" marking on lid, thus only differentiated by SSPEC. * Steppings: C0, C1, E0

"Yorkfield XE" (45 nm)

*These models feature an unlocked

*All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

'' * I/O Acceleration Technology (Intel I/OAT) supported by: QX9775 * Intel VT-d supported by: QX9650 * Die size: 2 × 107 mm² * Steppings: C0, C1, E0 * The QX9750 was never publicly released. Engineering samples have surfaced along with claims that Intel gave them away to employees sometime in 2009.

Core i (1st gen)

Lynnfield

Common features: * Socket:

LGA 1156 LGA 1156 (land grid array 1156), also known as Socket H or H1, is an Intel desktop CPU socket. The last processors supporting the LGA 1156 ceased production in 2011. It was succeeded by the mutually incompatible socket LGA 1155. LGA 1156, alon ...

. * All the CPUs support dual-channel

DDR3 Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high Bandwidth (computing), bandwidth ("double data rate") interface, and has been in use since 2007. ...

RAM at up to 1333

MT/s In computer technology, transfers per second and its more common secondary terms gigatransfers per second (abbreviated as GT/s) and megatransfers per second (MT/s) are informal language that refer to the number of operations transferring data that ...

speed. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

DMI DMI may refer to: Organizations * Danish Meteorological Institute * Data Management Inc., a time-and-attendance software company * Dead Man Incorporated, a predominantly white prison-gang formed in Maryland * Development Media International, a ...

1.0 bus to the chipset ( PCH). * No integrated graphics. * L1

cache Cache, caching, or caché may refer to: Science and technology * Cache (computing), a technique used in computer storage for easier data access * Cache (biology) or hoarding, a food storing behavior of animals * Cache (archaeology), artifacts p ...

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

45 nm Per the International Technology Roadmap for Semiconductors, the 45 nm process is a MOSFET technology node referring to the average half-pitch of a memory cell manufactured at around the 2007–2008 time frame. Matsushita and Intel started mas ...

. * K-suffix processors have an unlocked multiplier and can be overclocked.

Bloomfield

Common features: * Socket:

LGA 1366 LGA 1366 (land grid array 1366), also known as Socket B, is an Intel CPU socket. This socket supersedes Intel's LGA 775 (Socket T) in the high-end and performance desktop segments. It also replaces the server-oriented LGA 771 (Socket J) in the e ...

. * All the CPUs support triple-channel

RAM, at up to 1066

speed. * PCIe lanes are provided by the northbridge on the motherboard rather than by the CPU. * All CPUs feature a

QPI The Intel QuickPath Interconnect (QPI) is a scalable microprocessor, processor electrical connection, interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon, Itanium, and certain desktop platforms starting in 2008. It incr ...

bus to the chipset ( northbridge). ** Bus speed is 4.8

GT/s In computer technology, transfers per second and its more common secondary terms gigatransfers per second (abbreviated as GT/s) and megatransfers per second (MT/s) are informal language that refer to the number of operations transferring data that ...

on all the processors except for the Extreme Edition models, which run at 6.4 GT/s. * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

. * Extreme Edition processors have an unlocked multiplier and can be overclocked.

Clarkdale

Common features: * Socket:

. * All the CPUs support dual-channel

RAM, at up to 1333

speed. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

1.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

32 nm The "32 nm" node is the step following the "45 nm" process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch (i.e., half the distance between identical features) of a memory cell at this technolo ...

. * K-suffix processors have an unlocked multiplier and can be overclocked.

Gulftown

Common features: * Socket:

. * All the CPUs support triple-channel

RAM, at up to 1066

speed. * PCIe lanes are provided by the northbridge on the motherboard rather than by the CPU. * All CPUs feature a

bus to the chipset ( northbridge). ** Bus speed is 4.8

on all the processors except for the X-suffix models, which run at 6.4 GT/s. * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

. * X-suffix processors have an unlocked multiplier and can be overclocked.

Core i (2nd gen)

Sandy Bridge-DT

Common features: * Socket:

LGA 1155 LGA 1155, also called Socket H2, is a zero insertion force flip-chip land grid array (LGA) CPU socket designed by Intel for their CPUs based on the Sandy Bridge (second generation core) and Ivy Bridge (microarchitecture), Ivy Bridge (third gen ...

. * All the CPUs support dual-channel

RAM, at up to 1333

speed. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

. * K-suffix processors have an unlocked multiplier and can be overclocked. * i3-2120, i5-2400, and i7-2600 are available as embedded processors. * The Core i3-2102, once upgraded via Intel Upgrade Service, operates at 3.6 GHz, has 3 MB L3 cache and is recognized as Core i3-2153.

Core i (3rd gen)

Ivy Bridge-DT

Common features: * Socket:

. * All the CPUs support dual-channel

RAM, at up to 1600

speed. * All CPU models provide 16 lanes of PCIe. i5 and up models support it at

PCIe 3.0 PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as PCI, PCI ...

speeds while i3 models support it at PCIe 2.0 speeds. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. * K-suffix processors have an unlocked multiplier and can be overclocked. * i3-3220, i5-3550S and i7-3770 are available as embedded processors.

Sandy Bridge-E

Common features: * Socket:

LGA 2011 LGA 2011, also called ''Socket R'', is a CPU socket by Intel released on November 14, 2011. It launched along with LGA 1356 to replace its predecessor, LGA 1366 (Socket B) and LGA 1567. While LGA 1356 was designed for dual-processor or ...

. * All the CPUs support quad-channel

-1600 RAM. * All CPU models provide 40 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

. * K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

Core i (4th gen)

Haswell-DT

Common features: * Socket:

LGA 1150 LGA 1150, also known as Socket H3, is a zero insertion force flip-chip land grid array (LGA) CPU socket designed by Intel for CPUs built on the Haswell microarchitecture. This socket is also used by the Haswell's successor, Broadwe ...

. * All the CPUs support dual-channel

RAM at up to 1600

speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. * K-suffix processors have an unlocked multiplier and can be overclocked. * The following models are available as embedded processors: i3- 4330, 4350T, 4360, i5- 4570S, 4590T, 4590S, i7- 4770S, 4790S.

Haswell-H

Common features: * Socket: BGA 1364 (soldered). * All the CPUs support dual-channel

RAM, at up to 1600

speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * In addition to the Smart Cache (L3 cache), Haswell-H CPUs also contain 128 MB of

eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivale ...

acting as L4 cache. * Fabrication process: 22 nm.

Ivy Bridge-E

Common features: * Socket:

. * All the CPUs support quad-channel

-1866 RAM. * All CPU models provide 40 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. * K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

Core i (5th gen)

Broadwell-H

Common features: * Socket:

for C-suffix processors, BGA 1364 soldered for R-suffix. * All the CPUs support dual-channel

RAM. C-suffix processors support it at speeds up to 1600

, while R-suffix support it at 1866 MT/s. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * In addition to the Smart Cache (L3 cache), Broadwell-H CPUs also contain 128 MB of

acting as L4 cache. * Fabrication process: 14 nm.

Haswell-E

Common features: * Socket: LGA 2011-3. * All the CPUs support quad-channel

DDR4 Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth ("double data rate") interface. Released to the market in 2014, it is a variant of dynamic rando ...

-2133 RAM. * i7-5820K provides 28 lanes of

; i7-5930K and 5960X provide 40 lanes of PCIe 3.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. * K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

Core i (6th gen)

Skylake-S

Common features: * Socket:

LGA 1151 LGA 1151, also known as Socket H4, is a type of zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby L ...

. * All the CPUs support dual-channel

-2133 or

DDR3L Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed ...

-1600 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier and can be overclocked.

Skylake-H

Common features: * Socket: BGA 1440 (soldered). * All the CPUs support dual-channel

-2133 or

-1600 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * In addition to the Smart Cache (L3 cache), Skylake-H CPUs also contain 128 MB of

acting as L4 cache. * Fabrication process: 14 nm.

Broadwell-E

Common features: * Socket: LGA 2011-3. * All the CPUs support quad-channel

-2400 RAM. * i7-6800K provides 28 lanes of

; all other models provide 40 lanes of PCIe 3.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix and X-suffix processors have an unlocked multiplier and can be overclocked.

Core i (7th gen)

Kaby Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-2400 or

-1600 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier and can be overclocked.

Skylake-X

Common features: * Socket:

LGA 2066 LGA 2066, also called ''Socket R4'', is a CPU socket by Intel that debuted with Skylake-X and Kaby Lake-X processors in June 2017. It replaces Intel's LGA 2011-3 (R3) in the performance, high-end desktop and Workstation platforms (based on the ...

. * All the CPUs support quad-channel

-2400 RAM. Models i7-7820X and above support it up to 2666

speeds. * i7 models provide 28 lanes of

; i9 models provide 44 lanes of PCIe 3.0. * All CPUs feature a

3.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * X-suffix, and XE-suffix processors have an unlocked multiplier and can be overclocked.

Kaby Lake-X

Common features: * Socket:

. * All the CPUs support dual-channel

-2666 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * X-suffix processors have an unlocked multiplier and can be overclocked.

Core i (8th gen)

Coffee Lake-S

Common features: * Socket:

LGA 1151-2 LGA 1151, also known as Socket H4, is a type of zero insertion force flip-chip land grid array (LGA) CPU socket, socket for Intel desktop Central processing unit, processors which comes in two distinct versions: the first revision which supp ...

. * All the CPUs support dual-channel

RAM at up to 2400

speed. Models i5 and up support it at up to 2666 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier and can be overclocked.

Core i (9th gen)

Coffee Lake-R

Common features: * Socket:

. * All the CPUs support dual-channel

RAM at up to 2400

speed. Models i5 and up support it at up to 2666 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

Skylake-X (9xxx)

Common features: * Socket:

. * All the CPUs support quad-channel

-2666 RAM. * All CPU models provide 44 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * X-suffix, and XE-suffix processors have an unlocked multiplier and can be overclocked.

Core i (10th gen)

Comet Lake-S

Common features: * Socket:

LGA 1200 LGA 1200, also known as Socket H5, is a zero insertion force flip-chip land grid array (LGA) CPU socket, socket, compatible with Intel desktop Central processing unit, processors Comet Lake (10th gen) and Rocket Lake (11th-gen) desktop CPUs, whic ...

. * All the CPUs support dual-channel

RAM at up to 2666

speed. Models i7 and up support it at up to 2933 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 4-lane bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier and can be overclocked. * i9 and i7 models support Turbo Boost 3.0, while i5 and i3 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

Comet Lake-S (refresh)

Released on the same day as the 11th gen Rocket Lake-S desktop processors. Common features: * Socket:

. * All the CPUs support dual-channel

-2666 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 4-lane bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * All models support Turbo Boost 2.0.

Cascade Lake-X (10xxx)

Common features: * Socket:

. * All the CPUs support quad-channel

-2933 RAM. * All CPU models provide 48 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * X-suffix, and XE-suffix processors have an unlocked multiplier and can be overclocked.

Core i (11th gen)

Rocket Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-3200 RAM. The Core i9 K/KF processors enable a 1:1 ratio of DRAM to memory controller by default at DDR4-3200, whereas the Core i9 non K/KF and all other CPUs listed below enable a 2:1 ratio of DRAM to memory controller by default at DDR4-3200 and a 1:1 ratio by default at DDR4-2933. * All CPU models provide 20 lanes of

PCIe 4.0 PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as PCI, PCI ...

. * All CPUs feature a

3.0 8-lane bus to the chipset ( PCH). * L1

: 80 KB (48 KB data + 32 KB instructions) per core. * L2 cache: 512 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier and can be overclocked. * i9 and i7 models support Turbo Boost 3.0, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

Tiger Lake-B

Common features: * Socket: BGA 1787 (soldered). * All the CPUs support dual-channel

-3200 RAM. * All CPU models provide 20 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 80 KB (48 KB data + 32 KB instructions) per core. * L2 cache: 1.25 MB per core. * Fabrication process: 10 nm. * K-suffix processors have an unlocked multiplier and can be overclocked.
These CPUs
were sold to OEMs only.

Core i (12th gen)

Alder Lake-S

Common features: * Socket:

LGA 1700 LGA 1700 (Socket V) is a zero insertion force flip-chip land grid array (LGA) socket, compatible with Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, ...

. * All the CPUs support dual-channel

-3200 or

DDR5 Double Data Rate 5 Synchronous Dynamic Random-Access Memory (DDR5 SDRAM) is a type of synchronous dynamic random-access memory. Compared to its predecessor DDR4 SDRAM, DDR5 was planned to reduce power consumption, while doubling bandwidth. The ...

-4800 RAM. * All the CPUs provide 16 lanes of

PCIe 5.0 PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as PCI, PCI ...

and 4 lanes of

, but support may vary depending on motherboard and chipsets. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 1.25 MB per core. ** E-cores: 2 MB per E-core cluster (each "cluster" contains four cores) * Fabrication process: Intel 7. * K-suffix processors have an unlocked multiplier and can be overclocked. * i9 and i7 models support Turbo Boost 3.0 on the P-cores, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

Core i (13th gen)

Raptor Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-3200 or

-5600 RAM. * All the CPUs provide 16 lanes of

and 4 lanes of

, but support may vary depending on motherboard and chipsets. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core on i5-13600K/KF and above models, 1.25 MB per core on 13600 and below models. ** E-cores: 4 MB per E-core cluster on i5-13600K/KF and above models, 2 MB per cluster on 13600 and below models (each "cluster" contains four cores). * Fabrication process: Intel 7. * K-suffix processors have an unlocked multiplier and can be overclocked. * i9 and i7 models support Turbo Boost 3.0 on the P-cores, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

Core i (14th gen)

Raptor Lake-S Refresh

Common features: * Socket:

. * All the CPUs support dual-channel

-3200 or

-5600 RAM. * All the CPUs provide 16 lanes of

and 4 lanes of

, but support may vary depending on motherboard and chipsets. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core on i5-14600/T/K/KF and above models, 1.25 MB per core on 14500 and below models. ** E-cores: 4 MB per E-core cluster on i5-14600/T/K/KF and above models, 2 MB per cluster on 14500 and below models (each "cluster" contains four cores). * Fabrication process: Intel 7. * K-suffix processors have an unlocked multiplier and can be overclocked. * i9 and i7 models support Turbo Boost 3.0 on the P-cores, while i5 only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

Core Ultra (Series 2)

Arrow Lake-S

Common features: * Socket: LGA 1851. * All the CPUs support up to dual-channel

-5600 (UDIMM) or DDR5-6400 (

CUDIMM Registered memory (also called buffered memory) is computer memory that has a register between the DRAM modules and the system's memory controller. A registered memory module places less electrical load on a memory controller than an unregiste ...

) RAM. * All the CPUs provide 20 lanes of

and 4 lanes of

, but support may vary depending on motherboard and chipsets. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 112 KB (48 KB (12-Way) data + 64 KB (16-Way) instructions) per core. ** E-cores: 96 KB (32 KB (8-Way) data + 64 KB (16-Way) instructions) per core. * L2 cache: ** P-cores: 3 MB (12-Way) per core. ** E-cores: 4 MB (16-Way) per E-core cluster (each "cluster" contains four cores). * Fabrication process: Compute Tile (Contains the CPU cores)

TSMC Taiwan Semiconductor Manufacturing Company Limited (TSMC or Taiwan Semiconductor) is a Taiwanese multinational semiconductor contract manufacturing and design company. It is one of the world's most valuable semiconductor companies, the world' ...

's N3B node. * K-suffix processors have an unlocked multiplier and can be overclocked. * Core Ultra 9 and Core Ultra 7 models support Turbo Boost 3.0 on the P-cores, while Core Ultra 5 models only support Turbo Boost 2.0. The turbo clock speeds shown are of the highest turbo boost version supported by the processor.

Mobile processors

Core

Yonah

Core 2

"Merom-L" (65 nm)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Die size: 81 mm² * Steppings: A1

"Merom", "Merom-2M" (standard-voltage, 65 nm)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2)'' * Model T7600G features an unlocked clock multiplier. Only sold OEM in the

Dell XPS XPS ("Extreme Performance System") is a line of consumer-oriented laptop and desktop computers manufactured by Dell since 1993. History In the early 1990s, Dell primarily targeted its products at businesses rather than consumers. In early 19 ...

M1710. * ''

'': Supported by T5500 (L2), T5600 and all T7xxx * ''Intel Dynamic Front Side Bus Frequency Switching'': Supported by E1, G0, G2, M0 Steppings * Socket P processors can throttle the

front-side bus The front-side bus (FSB) is a computer communication interface ( bus) that was often used in Intel-chip-based computers during the 1990s and 2000s. The EV6 bus served the same function for competing AMD CPUs. Both typically carry data between th ...

(FSB) anywhere between 400 and 800 MT/s as needed. * Die size: 143 mm² (Merom), 111 mm² (Merom-2M) * Steppings: B2, E1, G0, G2 (Merom), L2, M0 (Merom-2M) * All models of stepping B2 released in July 2006, stepping L2 released in January 2007. See also: Versions of the same Merom-2M core with half the L2 cache disabled are available under the

Pentium Dual-Core The Pentium Dual-Core brand was used for mainstream x86-architecture microprocessors from Intel from 2006 to 2009, when it was renamed to Pentium. The processors are based on either the 32-bit '' Yonah'' or (with quite different microarchitectu ...

brand.

"Merom" (low-voltage, 65 nm)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * ''Intel Dynamic Front Side Bus Frequency Switching'': Supported by E1, G0, G2 Steppings * Die size: 143 mm² * Steppings: B2, E1, G0, G2

"Merom-2M" (ultra-low-voltage, 65 nm)

*All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

'' * Die size: 111 mm² * Steppings: L2, M0

"Merom XE" (65 nm)

''These models feature an unlocked

'' *All models support: '' MMX, SSE,

, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT), Intel Dynamic Front Side Bus Frequency Switching'' * Merom XE processors support Dynamic Front Side Bus Throttling between 400 and 800 MT/s. * Die size: 143 mm² * Steppings: E1, G0

"Penryn-L" (45 nm)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT), Intel Dynamic Acceleration (IDA)'' *

Socket P The Intel Socket P (mPGA478MN) is the mobile processor socket replacement for Core microarchitecture chips such as Core 2 Duo. It launched on May 9, 2007, as part of the Santa Rosa platform with the Merom and Penryn processors. Technical ...

processors can throttle the

(FSB) anywhere between 400 and 800 MT/s as needed. * Die size: 82 mm² * 228 million transistors * Package size: 22 mm × 22 mm * Steppings: M0, R0

"Penryn" (Apple iMac specific, 45 nm)

* Die size: 107 mm² * The 2008 20" iMac used the E8135 and E8335 CPUs at a lower than specified clock frequency, explaining why the same model is used at different frequencies. This list shows the frequencies used by Apple. * Steppings: C0, E0

"Penryn", "Penryn-3M" (standard-voltage, 45 nm)

*All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2), Intel Dynamic Acceleration (IDA)'' * T6570, T6670, all T8xxx and T9xxx models support

* All T9xxx models support

(TXT) * T6xxx models are Penryn-3M processors with 1 MB L2 cache disabled. Note that models T8100, T8300, T9300, T9500 are Penryn processors designed for Santa Rosa Refresh platforms with maximum FSB of 800 MT/s, whereas the rest of the Penryn processors are designed for Montevina platforms that can go up to maximum FSB of 1066 MT/s. Penryn processors support Dynamic Front Side Bus Throttling between 400–800MT/s. * Die size: 107 mm² (Penryn), 82 mm² (Penryn-3M) * Steppings: C0, E0 (Penryn) M0, R0 (Penryn-3M)

"Penryn", "Penryn-3M" (medium-voltage, 45 nm)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(except the non-Mac P7350, P7450),

(TXT), Intel Dynamic Acceleration (IDA)'' * Select

Apple An apple is a round, edible fruit produced by an apple tree (''Malus'' spp.). Fruit trees of the orchard or domestic apple (''Malus domestica''), the most widely grown in the genus, are agriculture, cultivated worldwide. The tree originated ...

subsets of P7000 series processors support Intel VT-x. * Penryn and Penryn-3M processors support Dynamic Front Side Bus Throttling between 533–1066MT/s. * Die size: 107 mm² (Penryn), 82 mm² (Penryn-3M) * Package size: 35 mm × 35 mm * Transistors: 410 million * Steppings: ( Core microarchitecture 45nm steppings) ** C0, E0 (Penryn) ** M0, R0 (Penryn-3M) **stepping C0/M0 is only used in the Intel Mobile 965 Express ( Santa Rosa refresh) platform **stepping E0/R0 adds two new instructions (XSAVE/XRSTOR) and supports the later Intel Mobile 4 Express ( Montevina) platform

"Penryn" (medium-voltage, 45 nm, Small Form Factor)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT), Intel Dynamic Acceleration (IDA)'' * Die size: 107 mm² * Package size: 22 mm × 22 mm * Steppings: C0, E0

"Penryn" (low-voltage, 45 nm, Small Form Factor)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT), Intel Dynamic Acceleration (IDA)'' * Die size: 107 mm² * Package size: 22 mm × 22 mm * Steppings: C0, E0

"Penryn-3M" (ultra-low-voltage, 45 nm, Small Form Factor)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT) (except SU7300), Intel Dynamic Acceleration (IDA)'' * Die size: 107 mm² * Package size: 22 mm × 22 mm * Steppings: M0, R0

"Penryn XE" (45 nm)

*These models feature an unlocked

*All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Penryn XE processors support Dynamic Front Side Bus Throttling between 400–800 MT/s and 533–1066 MT/s. * Die size: 107 mm² * Steppings: C0, E0

"Penryn QC" (45 nm)

* All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Can throttle the

(FSB) anywhere between 533 and 1066 MT/s as needed. * Die size: 2 × 107 mm² * Steppings: E0

"Penryn QC XE" (45 nm)

* This model features an unlocked

usually manipulated through the systems BIOS however some manufacturers (such as HP) do not have this feature enabled on their laptops that use this processor. * All models support: '' MMX, SSE,

.1, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

(iAMT2),

(TXT)'' * Can throttle the

(FSB) anywhere between 533 and 1066 MT/s as needed. * Package size: 35 mm × 35 mm * Die size: 2 × 107 mm² * Steppings: E0

Core i (1st gen)

Clarksfield

Common features: * Socket: G1. * All the CPUs support dual-channel

-1333 RAM. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

1.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

. * XM-suffix processors have an unlocked multiplier and can be overclocked.

Arrandale

Common features: * Socket: All models (except i3-380M) are available in BGA-1288; M-suffix (excluding UM- and LM-suffix) models are also available as Socket G1. * All the CPUs support dual-channel

RAM. All models support it at 800 MT/s speeds while M- and LM-suffix models support up to 1066 MT/s speeds. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

1.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

Core i (2nd gen)

Sandy Bridge-M

Common features: * Socket: G2, BGA 1023 (dual-core models), BGA 1224 (quad-core models). * All the CPUs support dual-channel

RAM. All models support it at 1333 MT/s speeds while i7-2720QM and above support up to 1600 MT/s speeds. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

. * XM-suffix models have an unlocked multiplier and can be overclocked.

Core i (3rd gen)

Ivy Bridge

Common features: * Socket: G2, BGA 1023 (dual-core models), BGA 1224 (quad-core models). * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 16 lanes of PCIe, except Y-suffix models which do not have PCIe support. i5 and i7 M-, QM- and XM-suffix models support it at

speeds, while all other models support it at PCIe 2.0 speeds. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. * XM-suffix models have an unlocked multiplier and can be overclocked.

Core i (4th gen)

Haswell-MB

Common features: * Socket: G3. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 16 lanes of PCIe. i5 and i7 models support it at

speeds, while i3 models support it at PCIe 2.0 speeds. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. * MX-suffix models have an unlocked multiplier and can be overclocked.

Haswell-ULT

Common features: * Socket: BGA 1168. * All the CPUs support dual-channel

LPDDR3 Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) that consumes less power than other random access memory designs and is thus targeted for mobile computing devices such ...

RAM, at up to 1600 MT/s speed. * All CPU models provide 12 lanes of PCIe 2.0 except i3-4xx5U models, which provide 10 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm.

Haswell-ULX

Common features: * Socket: BGA 1168. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 12 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm.

Haswell-H

Common features: * Socket: BGA 1364. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Models with Iris Pro 5200 iGPU also feature 128 MB of

, acting as L4 cache. * Fabrication process: 22 nm. * i7-4950HQ comes with an unlocked multiplier, allowing for users to overclock it beyond the factory set clock speed.

Core i (5th gen)

Broadwell-U

Common features: * Socket: BGA 1168. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. Models i5-5350U or above, along with all ix-5xx7 models, support LPDDR3 up to 1866 MT/s speed. * All CPU models provide 12 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Broadwell-HMCP, quad-core, 14 nm) 2">

Common features: * Socket: BGA 1364. * All the CPUs support dual-channel

RAM, at up to 1866 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Models with Iris Pro 6200 iGPU also feature 128 MB of

, acting as L4 cache. * Fabrication process: 14 nm.

Core M (5th gen)

Broadwell-Y

Common features: * Socket: BGA 1234. * All the CPUs support dual-channel

, DDR3L-RS or

RAM, at up to 1600 MT/s speed. * All CPU models provide 12 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (6th gen)

Skylake-U

Common features: * Socket: BGA 1356. * All the CPUs support dual-channel

-2133,

-1600 or

-1866 RAM. * All CPU models provide 12 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Skylake-H

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2133,

-1600 or

-1866 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Models with Iris Pro 580 iGPU also feature 128 MB of

, acting as L4 cache. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

Core M (6th gen)

Skylake-Y

Common features: * Socket: BGA 1515. * All the CPUs support dual-channel

-1600 or

-1866 RAM. * All CPU models provide 10 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (7th gen)

Kaby Lake-U

Common features: * Socket: BGA 1356. * All the CPUs support dual-channel

-2133,

-1600 or

-1866 RAM. * All CPU models provide 12 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Kaby Lake-H

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2400,

-1600 or

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

Kaby Lake-Y

Common features: * Socket: BGA 1515. * All the CPUs support dual-channel

-1866 or

-1600 RAM. * All CPU models provide 10 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core M (7th gen)

Kaby Lake-Y

Core m5 and Core m7 models were rebranded as

Core i5 Intel Core is a line of multi-core (with the exception of Core Solo and Core 2 Solo) central processing units (CPUs) for midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors ...

and

Core i7 Intel Core is a line of multi-core (with the exception of Core Solo and Core 2 Solo) central processing units (CPUs) for midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors ...

. Common features: * Socket: BGA 1515. * All the CPUs support dual-channel

-1600 or

-1866 RAM. * All CPU models provide 10 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (8th gen)

Coffee Lake-U

Common features: * Socket: BGA 1528. * All the CPUs support dual-channel

-2400 or

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Coffee Lake-H

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2666 RAM. Models i5-8300H and above also support

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

Coffee Lake-B

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2666 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Kaby Lake Refresh

Common features: * Socket: BGA 1356. * All the CPUs support dual-channel

-2400 or

-2133 RAM. * All CPU models provide 12 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Kaby Lake-G

Common features: * Socket: BGA 2270. * All the CPUs support dual-channel

-2400 RAM. * All CPU models provide 8 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * Kaby Lake-G CPUs have an embedded discrete Radeon RX Vega M GPU as listed in the table below, which have

HBM2 High Bandwidth Memory (HBM) is a computer memory interface for 3D-stacked synchronous dynamic random-access memory (SDRAM) initially from Samsung, AMD and SK Hynix. It is used in conjunction with high-performance graphics accelerators, network de ...

VRAM Video random-access memory (VRAM) is dedicated computer memory used to store the pixels and other graphics data as a framebuffer to be rendered on a computer monitor. It often uses a different technology than other computer memory, in order to ...

also embedded on the CPU package. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Amber Lake-Y

Common features: * Socket: BGA 1515. * All the CPUs support dual-channel

-1866 or

-1600 RAM. * All CPU models provide 10 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Whiskey Lake-U

Common features: * Socket: BGA 1528. * All the CPUs support dual-channel

-2400 or

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Cannon Lake-U

Common features: * Socket: BGA 1528. * All the CPUs support dual-channel

-2400 or

LPDDR4 Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) that consumes less power than other random access memory designs and is thus targeted for mobile computing devices such ...

(x)-2400 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 10 nm.

Core M (8th gen)

Amber Lake-Y

Core m5 and Core m7 models were rebranded as Core i5 and Core i7. Common features: * Socket: BGA 1515. * All the CPUs support dual-channel

-1600 or

-1866 RAM. * All CPU models provide 10 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (9th gen)

Coffee Lake-H (refresh)

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2666 or

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

Core i (10th gen)

Comet Lake-U

Common features: * Socket: BGA 1528. * All the CPUs support dual-channel

-2666,

-2933 or

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Comet Lake-H

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

RAM, at up to 2933 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * K-suffix processors have an unlocked multiplier, allowing it to be overclocked.

Ice Lake-U

Common features: * Socket: BGA 1526, except for models with 'N' in the name which use a smaller BGA 1344 package. * All the CPUs support dual-channel

-3200 or

-3733 RAM. *

support. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 80 KB (48 KB data + 32 KB instructions) per core. * L2 cache: 512 KB per core. * Fabrication process: 10 nm.

Ice Lake-Y

Common features: * Socket: BGA 1377, except for models with 'N' in the name which use a smaller BGA 1044 package. * All the CPUs support dual-channel

RAM, at up to 3733 MT/s speed. *

support. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 80 KB (48 KB data + 32 KB instructions) per core. * L2 cache: 512 KB per core. * Fabrication process: 10 nm.

Amber Lake-Y (10xxx)

Common features: * Socket: BGA 1377, except for i3-10100Y which uses a smaller BGA package of unknown name. * All the CPUs support dual-channel

-1600 or

-1866 RAM. Models i3-10110Y and up support LPDDR3 at up to 2133 MT/s speed. * All CPU models provide 10 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (11th gen)

Tiger Lake-UP3

Common features: * Socket: BGA 1449. * All the CPUs support dual-channel

-3200 or

LPDDR4X Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) that consumes less power than other random access memory designs and is thus targeted for mobile computing devices such ...

-3733 RAM. i5 models and up support LPDDR4X at up to 4266 MT/s speed. * All CPU models provide 4 lanes of

, in addition to PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 80 KB (48 KB data + 32 KB instructions) per core. * L2 cache: 1.25 MB per core. * Fabrication process: 10 nm. * The base clock speed that the CPU runs at corresponds with the configurable TDP (cTDP) setting chosen.

Tiger Lake-UP4

Common features: * Socket: BGA 1598. * All the CPUs support dual-channel

-4266 RAM. * All CPU models provide 4 lanes of

, in addition to PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

Tiger Lake-H

Common features: * Socket: BGA 1598. * All the CPUs support dual-channel

-3200 RAM. * All CPU models provide 20 lanes of

, in addition to 24 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

3.0 8-lane bus to the chipset ( PCH). * L1

Tiger Lake-H35

Common features: * Socket: BGA 1449. * All the CPUs support dual-channel

-3200 or

-4266 RAM. *

support; 12× PCIe lanes provided by on-package PCH are revision 3.0. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

Core i (12th gen)

Alder Lake-U

Common features: * Socket: BGA 1781 (ix-12x0U), BGA 1744 (ix-12x5U). * All the CPUs support dual-channel

LPDDR5 Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) that consumes less power than other random access memory designs and is thus targeted for mobile computing devices such ...

-5200 or

-4266 RAM. ix-12x5U models also support dual-channel

-4800 and

-3200 RAM in addition. * ix-12x0 models provide 4 lanes of

and 8 lanes of PCIe 3.0, while ix-12x5U models provide 8 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Alder Lake-P

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-4800,

-3200,

-5200 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 1.25 MB per core. ** E-cores: 2 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7. * The following models are available with IPU (image processing unit)
i5-1235U
Specifications between them and the respective processor without IPU are completely identical, apart from the addition of the IPU.

Alder Lake-H

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-4800,

-3200,

-5200 or

-4266 RAM. * All CPU models provide 16 lanes of

, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Alder Lake-HX

Common features: * Socket: BGA 1964. * All the CPUs support dual-channel

-4800 or

-3200 RAM. * All CPU models provide 16 lanes of

and 4 lanes of PCIe 4.0, in addition to 16 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the on-package chipset ( PCH). * L1

Alder Lake-N

These are essentially "E-core-only" CPUs, utilizing the Gracemont architecture. Common features: * Socket: BGA 1264. * All the CPUs support dual-channel

-4800,

-3200 or

-4800 RAM. * All CPU models provide 9 lanes of

. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: 2 MB per cluster (each "cluster" contains four cores). * Fabrication process: Intel 7.

Core i (13th gen)

Raptor Lake-U

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 4 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7. * Th
i3-1315U
is available with IPU (image processing unit). Specifications between it and the respective processor without IPU are completely identical, apart from the addition of the IPU.

Raptor Lake-P

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (32 KB data + 64 KB instructions) per core. * L2 cache: ** P-cores: (up to) 2 MB per core. ** E-cores: (up to) 4 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7.

Raptor Lake-H

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 8 lanes of PCIe 4.0, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 4 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7. * K-suffix processors have an unlocked multiplier, allowing it to be overclocked. * Th
i5-13500H
is available with IPU (image processing unit). Specifications between it and the respective processor without IPU are completely identical, apart from the addition of the IPU.

Raptor Lake-PX

Common features: * Socket: BGA 1792. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 8 lanes of PCIe 4.0, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Raptor Lake-HX

Common features: * Socket: BGA 1964. * All the CPUs support dual-channel

-4800 or

-3200 RAM. Models i7-13850HX and up support DDR5 at up to 5600 MT/s speed. * All CPU models provide 16 lanes of

and 4 lanes of PCIe 4.0, in addition to 16 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the on-package chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 4 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7. * All models support CPU, iGPU, and memory overclocking. * i9-13980HX features Thermal Velocity Boost. Without it enabled, the maximum boost clock speed is 0.1 GHz lower.

Core i (14th gen)

Raptor Lake-HX Refresh

Common features: * Socket: BGA 1964. * All the CPUs support dual-channel

-5600 or

-3200 RAM. * All CPU models provide 16 lanes of

and 4 lanes of PCIe 4.0, in addition to 16 lanes of PCIe 4.0 and 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 4 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7. * All models support CPU, iGPU, and memory overclocking. * i7-14650HX, i7-14700HX, and i9-14900HX feature Thermal Velocity Boost. Without it enabled, the maximum boost clock speed is 0.1 GHz lower. * i7-14700HX, and i9-14900HX feature Intel Application Optimization.

Core / Core Ultra 3/5/7/9 (Series 1)

Raptor Lake-U Refresh

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * Includes integrated graphics based on Xe-LP architecture. * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 4 MB per E-core cluster (each "cluster" contains four cores). * Fabrication process: Intel 7. * Th
Core 3 100U
is available with IPU (image processing unit). Specifications between it and the respective processor without IPU are completely identical, apart from the addition of the IPU.

Meteor Lake-U

Common features: * Socket: BGA 2049. * All the CPUs except 1x4U models support dual-channel

-5600 or

LPDDR5X Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory (SDRAM) that consumes less power than other random access memory designs and is thus targeted for mobile computing devices such ...

-7466 RAM. 1x4U models support dual-channel LPDDR5(X)-6400. * All CPU models provide 20 lanes of

. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * Includes integrated graphics based on

Alchemist Alchemy (from the Arabic word , ) is an ancient branch of natural philosophy, a philosophical and protoscientific tradition that was historically practised in China, India, the Muslim world, and Europe. In its Western form, alchemy is first ...

architecture. * L1

: ** P-cores: 112 KB (48 KB data + 64 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 2 MB per E-core cluster (each "cluster" contains four cores). * All processor models also feature 2× "LP E-Cores" which are clocked at 0.7 GHz base (0.4 GHz on 1x4U models), 2.1 GHz boost and have 2 MB of L2 cache. * Fabrication process: Intel 4 (compute tile). * Configurable TDP (cTDP) of 12–28 W is featured on 1x5U models, and 9–15 W on 1x4U models.

Meteor Lake-H

Common features: * Socket: BGA 2049. * All the CPUs support dual-channel

-5600 or

-7466 RAM. * All CPU models provide 8 lanes of

and 20 lanes of PCIe 4.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * Includes integrated graphics based on

architecture. * L1

: ** P-cores: 112 KB (48 KB data + 64 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 2 MB per E-core cluster (each "cluster" contains four cores). * All processor models also feature 2× "LP E-Cores" which are clocked at 0.7 GHz base (1.0 GHz on Core Ultra 9 185H), 2.5 GHz boost and have 2 MB of L2 cache. * Fabrication process: Intel 4 (compute tile). * Configurable TDP (cTDP) of 35–65 W is featured on Core Ultra 9 185H, and 20–65 W on all other models.

Core / Core Ultra 5/7/9 (Series 2)

Raptor Lake-U Refresh

Arrow Lake-U

Lunar Lake

Common features: * Socket: BGA 2833. * All the CPUs support dual-channel

-8533 RAM (on package). * All CPU models provide 4 lanes of

. * L1

: ** P-cores: 112 KB (48 KB (12-Way) data + 64 KB (16-Way) instructions) per core. ** E-cores: 96 KB (32 KB (8-Way) data + 64 KB (16-Way) instructions) per core. * L2 cache: ** P-cores: 2.5 MB (10-Way) per core. ** E-cores: 4 MB (16-Way) per E-core cluster (each "cluster" contains four cores). * Fabrication process: Compute Tile (Contains the CPU cores)

's N3B node.

Raptor Lake-H Refresh

Arrow Lake-H

Arrow Lake-HX

Common features: * Core Ultra 9 285HX supports Intel vPro and related technologies.

Twin Lake-N

Embedded processors

Core i (1st gen)

Arrandale

Common features: * Socket: BGA 1288. * All the CPUs support dual-channel

RAM. All models support it at 800 MT/s speeds while E- and LE-suffix models support up to 1066 MT/s speeds. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

1.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

Core i (2nd gen)

Sandy Bridge-DT

The following models from the Sandy Bridge desktop range are available as embedded processors: * Core i7-2600 * Core i5-2400 * Core i3-2120 See section Desktop processors § Sandy Bridge-DT for full info.

Sandy Bridge-M

Common features: * Socket: G2 (2xx0E and 2xx0QE models except i3-2310E), BGA 1023 (all other models). * All the CPUs support dual-channel

RAM. All models support it at 1333 MT/s speeds while i7-2720QM and above support up to 1600 MT/s speeds. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

Gladden

Common features: * Socket: BGA 1284. * All the CPUs support dual-channel

-1333 RAM. * All CPU models provide 16 lanes of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

Core i (3rd gen)

Ivy Bridge-DT

The following models from the Ivy Bridge desktop range are available as embedded processors: * Core i7-3770 * Core i5-3550S * Core i3-3220 See section Desktop processors § Ivy Bridge-DT for full info.

Ivy Bridge-M

Common features: * Socket: G2 (3xx0ME/QE models only), BGA 1023 (all other models and also i5-3610ME, i3-3120ME). * All the CPUs support dual-channel

and

RAM, at up to 1600 MT/s speed. * i7 models provide 16 lanes of

, while i5 models provide 1 lane of PCIe 3.0 and i3 models provide 1 lane of PCIe 2.0. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process:

Gladden

Common features: * Socket: BGA 1284. * All the CPUs support dual-channel

and

1333 MT/s RAM. * All CPU models provide 20 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * No integrated graphics. * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm.

Core i (4th gen)

Haswell-DT

Common features: * Socket:

. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 22 nm. The following models from the Haswell-DT desktop range are also available as embedded processors: * Core i7-4790S * Core i7-4770S * Core i5-4590S * Core i5-4590T * Core i5-4570S * Core i3-4360 * Core i3-4350T * Core i3-4330 See section Desktop processors § Haswell-DT for full info.

Haswell-H

Common features: * Socket: BGA 1364. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Models with Iris Pro 5200 iGPU also feature 128 MB of

, acting as L4 cache. * Fabrication process: 22 nm.

Core i (5th gen)

Broadwell-H

Common features: * Socket: BGA 1364. * All the CPUs support dual-channel

RAM, at up to 1600 MT/s speed. * All CPU models provide 16 lanes of

. * All CPUs feature a

2.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Models with Iris Pro 6200 iGPU also feature 128 MB of

, acting as L4 cache. * Fabrication process: 14 nm.

Core i (6th gen)

Skylake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-2133 or

-1600 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Skylake-H

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2133,

-1600 or

-1866 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Models with Iris Pro 580 iGPU also feature 128 MB of

, acting as L4 cache. * Fabrication process: 14 nm.

Core i (7th gen)

Kaby Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-2400 or

-1600 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Kaby Lake-H

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2400 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (8th gen)

Whiskey Lake-U

Common features: * Socket: BGA 1528. * All the CPUs support dual-channel

-2400 or

-2133 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (9th gen)

Coffee Lake-R

Common features: * Socket:

. * All the CPUs support dual-channel

-2400 RAM. i5 models and up support it at up to 2666 MT/s speeds. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Coffee Lake-H (refresh)

Common features: * Socket: BGA 1440. * All the CPUs support dual-channel

-2666 RAM. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm.

Core i (10th gen)

Comet Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-2666 RAM. i7 models and higher support it at up to 2933 MT/s speeds. * All CPU models provide 16 lanes of

. * All CPUs feature a

3.0 4-lane bus to the chipset ( PCH). * L1

: 64 KB (32 KB data + 32 KB instructions) per core. * L2 cache: 256 KB per core. * Fabrication process: 14 nm. * i9-10900E features Thermal Velocity Boost.

Core i (11th gen)

Tiger Lake-UP3

Common features: * Socket: BGA 1449. * All the CPUs support dual-channel

-3200 or

-3733 RAM. i5 models and up support LPDDR4X at up to 4266 MT/s speed. * All CPU models provide 4 lanes of

, in addition to PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

: 80 KB (48 KB data + 32 KB instructions) per core. * L2 cache: 1.25 MB per core. * Fabrication process: 10 nm. * All models have configurable TDP (cTDP), which can be set from a minimum of 12 W to 28 W. Base clocks shown are at 15 W TDP; they will be different depending on the cTDP setting chosen. * -GRE suffix models have a minimum operating temperature of -40°C as opposed to 0°C for the normal models, and also feature "in-band ECC" for memory.

Tiger Lake-H

Common features: * Socket: BGA 1598. * All the CPUs support dual-channel

-3200 RAM. * All CPU models provide 20 lanes of

, in addition to 24 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

3.0 bus to the chipset ( PCH). * L1

Core i (12th gen)

Alder Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-3200 or

-4800 RAM * All the CPUs provide 16 lanes of

and 4 lanes of

, but support may vary depending on motherboard and chipsets. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Alder Lake-U

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-4800,

-3200,

-5200 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Alder Lake-P

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-4800,

-3200,

-5200 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Alder Lake-PS

Common features: * Socket: LGA 1700. While sharing the same socket as Alder Lake-S and Raptor Lake-S, this revision of LGA 1700 is electrically ''incompatible'' with other 12th and 13th generation Intel Core desktop processors. * All the CPUs support dual-channel

-4800 or

-3200 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Alder Lake-H

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-4800,

-3200,

-5200 or

-4266 RAM. * All CPU models provide 16 lanes of

, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Core i (13th gen)

Raptor Lake-S

Common features: * Socket:

. * All the CPUs support dual-channel

-3200 or

-5600 RAM. * All the CPUs provide 16 lanes of

and 4 lanes of

, but support may vary depending on motherboard and chipsets. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

: ** P-cores: 80 KB (48 KB data + 32 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core on i7 and above models, 1.25 MB per core on i5 and below models. ** E-cores: 4 MB per E-core cluster on i7 and above models, 2 MB per cluster on i5 and below models (each "cluster" contains four cores). * Fabrication process: Intel 7. * Turbo Boost version is 2.0.

Raptor Lake-U

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Raptor Lake-P

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 12 lanes of PCIe 3.0. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Raptor Lake-H

Common features: * Socket: BGA 1744. * All the CPUs support dual-channel

-5200,

-3200,

-6400 or

-4266 RAM. * All CPU models provide 8 lanes of

and 8 lanes of PCIe 4.0, in addition to 12 lanes of PCIe 3.0 provided by the on-package PCH. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * L1

Core / Core Ultra 3/5/7/9 (Series 1)

Meteor Lake-PS

Common features: * Socket: LGA 1851 (electrically incompatible with the socket used by non-embedded processors such as Arrow Lake-S). * All the CPUs support dual-channel

-5600 RAM. * All CPU models provide 20 lanes of

. * All CPUs feature a

4.0 8-lane bus to the chipset ( PCH). * Includes integrated graphics based on

architecture. * L1

: ** P-cores: 112 KB (48 KB data + 64 KB instructions) per core. ** E-cores: 96 KB (64 KB data + 32 KB instructions) per core. * L2 cache: ** P-cores: 2 MB per core. ** E-cores: 2 MB per E-core cluster (each "cluster" contains four cores). * All processor models also feature 2× "LP E-Cores" which are clocked at 0.7 GHz base, 2.1 GHz boost (2.5 GHz on HL-suffix models) and have 2 MB of L2 cache. * Fabrication process: Intel 4 (compute tile). * Configurable TDP (cTDP) of 12–28 W is featured on UL-suffix models, and 20–65 W on HL-suffix models.

References

ATI provides pointer to Intel's 'Allendale'
May 23, 2006
Rumoured prices and specifications for Intel Core 2
May 30, 2006
TGDaily indicates leaked release dates
July 24, 2006

as re-reported by DigiTimes, July 17, 2006

July 27, 2006

July 16, 2007 * ttp://xtreview.com/addcomment-id-2933-view-Core-2-duo-1333-mhz-stepping.html CORE 2 DUO 1333 MHZ STEPPING, July 18, 2007

External links

Search MDDS Database

Intel ARK DatabaseSSPEC/QDF Reference
(Intel)
Intel® Processor Names, Numbers and Generation List

Intel Core Duo Processor and Core Solo Processor on 65 nm Process Datasheet

Intel Core Duo Processor and Core Solo Processor on 65 nm Process Specification Update

* ttp://www.intel.com/support/processors/mobile/corei7extreme/sb/CS-030874.htm Intel Core i7 mobile processor Extreme Edition product order code table
Intel's Core i7 web page

* ttps://web.archive.org/web/20141104224122/http://www.intc.com/pricelist.cfm Intel Corporation – Processor Price List
Intel Corporation – Processor Price List

Intel Core X-series processors
{{Authority control *Core *Core 2 *Core i3 *Core i5 *Core i7 *Core i9 Intel Core Intel Core 2 Intel Core i3 Intel Core i5 Intel Core i7 Intel Core i9

Desktop processors

Core 2

"Allendale" (65 nm, 800 MT/s In computer technology, transfers per second and its more common secondary terms gigatransfers per second (abbreviated as GT/s) and megatransfers per second (MT/s) are informal language that refer to the number of operations transferring data that ...)

"Conroe" (65 nm, 1066 MT/s)

"Conroe" (65 nm, 1333 MT/s)

"Conroe-CL" (65 nm, 1066 MT/s)

"Conroe XE" (65 nm)

"Kentsfield" (65 nm)

"Kentsfield XE" (65 nm)

"Wolfdale-3M" (45 nm, 1066 MT/s)

"Wolfdale" (45 nm, 1333 MT/s)

"Yorkfield-6M" (45 nm)

Yorkfield (45 nm)

"Yorkfield XE" (45 nm)

Core i (1st gen)

Lynnfield

Bloomfield

Clarkdale

Gulftown

Core i (2nd gen)

Sandy Bridge-DT

Core i (3rd gen)

Ivy Bridge-DT

Sandy Bridge-E

Core i (4th gen)

Haswell-DT

Haswell-H

Ivy Bridge-E

Core i (5th gen)

Broadwell-H

Haswell-E

Core i (6th gen)

Skylake-S

Skylake-H

Broadwell-E

Core i (7th gen)

Kaby Lake-S

Skylake-X

Kaby Lake-X

Core i (8th gen)

Coffee Lake-S

Core i (9th gen)

Coffee Lake-R

Skylake-X (9xxx)

Core i (10th gen)

Comet Lake-S

Comet Lake-S (refresh)

Cascade Lake-X (10xxx)

Core i (11th gen)

Rocket Lake-S

Tiger Lake-B

Core i (12th gen)

Alder Lake-S

Core i (13th gen)

Raptor Lake-S

Core i (14th gen)

Raptor Lake-S Refresh

Core Ultra (Series 2)

Arrow Lake-S

Mobile processors

Core

Yonah

Core 2

"Merom-L" (65 nm)

"Merom", "Merom-2M" (standard-voltage, 65 nm)

"Merom" (low-voltage, 65 nm)

"Merom-2M" (ultra-low-voltage, 65 nm)

"Merom XE" (65 nm)

"Penryn-L" (45 nm)

"Penryn" (Apple iMac specific, 45 nm)

"Penryn", "Penryn-3M" (standard-voltage, 45 nm)

"Penryn", "Penryn-3M" (medium-voltage, 45 nm)

"Penryn" (medium-voltage, 45 nm, Small Form Factor)

"Penryn" (low-voltage, 45 nm, Small Form Factor)

"Penryn-3M" (ultra-low-voltage, 45 nm, Small Form Factor)

"Penryn XE" (45 nm)

"Penryn QC" (45 nm)

"Penryn QC XE" (45 nm)

Core i (1st gen)

Clarksfield

"Allendale" (65 nm, 800
MT/s In computer technology, transfers per second and its more common secondary terms gigatransfers per second (abbreviated as GT/s) and megatransfers per second (MT/s) are informal language that refer to the number of operations transferring data that ...
)