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The GAL22V10 is a series of programmable-logic devices from
The GAL22V10 has 12 input pins, and 10 pins that can be configured as either inputs or outputs, and exists in various switching speeds, from 25 to 4 ns. Each output is driven by an output-logic macrocell (OLMC), with an output-enable product term, and a variable number of product terms, ranging from eight to sixteen. Each OLMC may be set to output as inverting or non-inverting, and be placed into either registered or combinatorial mode. In registered mode, each macrocell actively uses a D-flip-flop to hold a state under control of the data input from the logic portion of the macrocell and the rising edge of the clock signal, while in combinatorial mode the flip-flop is removed from the macrocell and the outputs are driven directly by the logic. In the latter mode, the pin may also dynamically switch between input and output based on the product term. In either mode the pin value is fed back into the array as a product term. Combinations are set using an E2PROM. The output registers can be preloaded into a potentially invalid state for testing by a GAL22V10 programmer. Inputs and outputs include active pull-ups and are transistor-transistor logic compatible due to high-impedance buffers.
A user electronic signature section is included for details such as user ID codes, revision IDs, or asset tagging on official Lattice Semiconductor units, as well as a static ES section for compatibility with non-Lattice Semiconductor GAL22V10 units. In addition, a security cell is included which, when set, disallows the retrieval of the array logic from the chip, until a new set of logic is set.
Latch-up protection is implemented using n-pullups and a
The GAL16V8 and GAL20V8 are similar in concept to the GAL22V10, but have fewer I/O pins in smaller packages.
(archive)
/small> * ''PAL Programmable Logic Handbook''; 4ed;(archive)
/small> * ''PEEL Software and Applications Handbook''; International CMOS Technology (ICT); 138 pages; 1989.(archive)
/small> * (also, see design guide sections of databooks below) ;Historical Lattice documents
Introduction to GAL Device Architectures
15 pages; 1998. * Lattic
GAL22V10 datasheet
29 pages; 1998. * Lattic
GAL16V8 datasheet
22 pages; 2001. ;Historical AMD documents * AM
''PALCE16V8H Datasheet and Design Guide''
61 pages; 1989. * AM
''PAL Databook and Design Guide''
764 pages; 1993. ;Historical National documents * Nationa
''Programmable Logic Devices Databook and Design Guide''
502 pages; 1990. ;Microchip/Atmel documents (modern lower-power parts that are still being manufactured) * Microchi
ATF22V10BATF22V10C, ATF22V10CQATF22V10CQZ
datasheets. * Microchi
ATF16V8B, ATF16V8BQLATF16V8CATF16V8CZ
datasheets.
GALasm
- open-source GAL assembler.
Galette
- open-source GAL assembler.
Afterburner
- open-source GAL hardware programmer. Field-programmable gate arrays
The GAL22V10 is a series of programmable-logic devices from Lattice Semiconductor
Lattice Semiconductor Corporation is an American semiconductor company specializing in the design and manufacturing of low power field-programmable gate arrays (FPGAs). Headquartered in the Silicon Forest area of Hillsboro, Oregon, the company a ...
, implemented as CMOS-based generic array logic ICs, and available in dual inline package
In microelectronics, a dual in-line package (DIP or DIL) is an electronic component package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board (PC ...
s or plastic leaded chip carrier
In electronics, a chip carrier is one of several kinds of surface-mount technology packages for integrated circuits (commonly called "chips"). Connections are made on all four edges of a square package; compared to the internal cavity for mount ...
s. It is an example of a standard production GAL (General Array Logic) device that is often used in educational settings as a basic programmable-logic device. In combinatorial mode, it is conceptually a group of programmable AND-OR-invert
AND-OR-invert (AOI) logic and AOI gates are two-level compound (or complex) logic functions constructed from the combination of one or more AND gates followed by a NOR gate (equivalent to an OR gate through an Inverter gate, which is the "OI" part ...
(AOI) (AND-NOR) gates or AND-OR gates.
Specifications
The GAL22V10 has 12 input pins, and 10 pins that can be configured as either inputs or outputs, and exists in various switching speeds, from 25 to 4 ns. Each output is driven by an output-logic macrocell (OLMC), with an output-enable product term, and a variable number of product terms, ranging from eight to sixteen. Each OLMC may be set to output as inverting or non-inverting, and be placed into either registered or combinatorial mode. In registered mode, each macrocell actively uses a D-flip-flop to hold a state under control of the data input from the logic portion of the macrocell and the rising edge of the clock signal, while in combinatorial mode the flip-flop is removed from the macrocell and the outputs are driven directly by the logic. In the latter mode, the pin may also dynamically switch between input and output based on the product term. In either mode the pin value is fed back into the array as a product term. Combinations are set using an E2PROM. The output registers can be preloaded into a potentially invalid state for testing by a GAL22V10 programmer. Inputs and outputs include active pull-ups and are transistor-transistor logic compatible due to high-impedance buffers.
A user electronic signature section is included for details such as user ID codes, revision IDs, or asset tagging on official Lattice Semiconductor units, as well as a static ES section for compatibility with non-Lattice Semiconductor GAL22V10 units. In addition, a security cell is included which, when set, disallows the retrieval of the array logic from the chip, until a new set of logic is set.
Latch-up protection is implemented using n-pullups and a charge pump
A charge pump is a kind of DC-to-DC converter that uses capacitors for energetic charge storage to raise or lower voltage. Charge-pump circuits are capable of high efficiencies, sometimes as high as 90–95%, while being electrically simple ...
in the official Lattice Semiconductor models.
Availability
The GAL22V10D had been discontinued byLattice Semiconductor
Lattice Semiconductor Corporation is an American semiconductor company specializing in the design and manufacturing of low power field-programmable gate arrays (FPGAs). Headquartered in the Silicon Forest area of Hillsboro, Oregon, the company a ...
as of June 2010 with the last shipment in June 2011. No pin-compatible replacements have been offered or recommended by Lattice.
Multiple variations of the Microchip
An integrated circuit (IC), also known as a microchip or simply chip, is a set of electronic circuits, consisting of various electronic components (such as transistors, resistors, and capacitors) and their interconnections. These components a ...
/ Atmel ATF22V10 are pin-compatible replacements, and available in PDIP, SOIC, PLCC, TSSOP packages.
Related parts
The GAL16V8 and GAL20V8 are similar in concept to the GAL22V10, but have fewer I/O pins in smaller packages.
References
Further reading
;Historical books * ''Programmable Logic Designer's Guide''; Roger Alford; Sams Publishing; 1989; {{ISBN, 0-672-22575-1./small> * ''PAL Programmable Logic Handbook''; 4ed;
Monolithic Memories
Monolithic Memories, Inc. (MMI) was an American semiconductor company which produced bipolar PROMs, programmable logic devices, and logic circuits (including 7400 series TTL).
A team of MMI engineers, under the direction of Ze'ev Drori and h ...
; 407 pages; 1985. /small> * ''PEEL Software and Applications Handbook''; International CMOS Technology (ICT); 138 pages; 1989.
/small> * (also, see design guide sections of databooks below) ;Historical Lattice documents
Introduction to GAL Device Architectures
15 pages; 1998. * Lattic
GAL22V10 datasheet
29 pages; 1998. * Lattic
GAL16V8 datasheet
22 pages; 2001. ;Historical AMD documents * AM
''PALCE16V8H Datasheet and Design Guide''
61 pages; 1989. * AM
''PAL Databook and Design Guide''
764 pages; 1993. ;Historical National documents * Nationa
''Programmable Logic Devices Databook and Design Guide''
502 pages; 1990. ;Microchip/Atmel documents (modern lower-power parts that are still being manufactured) * Microchi
ATF22V10B
datasheets. * Microchi
ATF16V8B, ATF16V8BQL
datasheets.
External links
GALasm
- open-source GAL assembler.
Galette
- open-source GAL assembler.
Afterburner
- open-source GAL hardware programmer. Field-programmable gate arrays