Skylake
is
Intel's codename for its sixth generation
Core
Core or cores may refer to:
Science and technology
* Core (anatomy), everything except the appendages
* Core (laboratory), a highly specialized shared research resource
* Core (manufacturing), used in casting and molding
* Core (optical fiber ...
microprocessor
A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...
family that was launched on August 5, 2015, succeeding the
Broadwell microarchitecture.
Skylake is a microarchitecture redesign using the same
14 nm manufacturing process technology as its predecessor, serving as a tock in Intel's
tick–tock manufacturing and design model. According to Intel, the redesign brings greater CPU and
GPU
A graphics processing unit (GPU) is a specialized electronic circuit designed for digital image processing and to accelerate computer graphics, being present either as a discrete video card or embedded on motherboards, mobile phones, personal ...
performance and reduced power consumption. Skylake CPUs share their microarchitecture with
Kaby Lake
Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's p ...
,
Coffee Lake
Coffee Lake is Intel's codename for its eighth-generation Core microprocessor family, announced on September 25, 2017. It is manufactured using Intel's second 14 nm process node refinement. Desktop Coffee Lake processors introduced i5 and i7 CP ...
,
Whiskey Lake
Whiskey Lake is Intel's codename for a family of third-generation 14nm Skylake low-power mobile processors. Intel announced Whiskey Lake on August 28, 2018.
Changes
* 14++ nm process, same as Coffee Lake
* Increased turbo clocks (300–600& ...
, and
Comet Lake
Comet Lake is Intel's codename for its 10th generation Core processors. They are manufactured using Intel's third 14 nm Skylake process revision, succeeding the Whiskey Lake U-series mobile processor and Coffee Lake desktop processor fami ...
CPUs.
Skylake is the last Intel platform on which Windows earlier than
Windows 10
Windows 10 is a major release of Microsoft's Windows NT operating system. The successor to Windows 8.1, it was Software release cycle#Release to manufacturing (RTM), released to manufacturing on July 15, 2015, and later to retail on July 2 ...
are officially supported by
Microsoft
Microsoft Corporation is an American multinational corporation and technology company, technology conglomerate headquartered in Redmond, Washington. Founded in 1975, the company became influential in the History of personal computers#The ear ...
,
although enthusiast-created
modifications are available that disabled the
Windows Update
Windows Update is a Microsoft service for the Windows 9x and Windows NT families of the Microsoft Windows operating system, which automates downloading and installing Microsoft Windows software updates over the Internet. The service delivers sof ...
check and allowed
Windows 8.1
Windows 8.1 is a release of the Windows NT operating system developed by Microsoft. It was released to manufacturing on August 27, 2013, and broadly released for retail sale on October 17, 2013, about a year after the retail release of its pr ...
and earlier to continue to receive
Windows Update
Windows Update is a Microsoft service for the Windows 9x and Windows NT families of the Microsoft Windows operating system, which automates downloading and installing Microsoft Windows software updates over the Internet. The service delivers sof ...
s on this and later platforms.
Some of the processors based on the Skylake microarchitecture are marketed as sixth-generation Core.
Intel officially declared end of life and discontinued Skylake LGA 1151 CPUs (except i3-6100, i5-6500, and Xeon E3 v5) on March 4, 2019.
Development history
Skylake's development, as with previous processors such as
Banias
Banias (; ; Judeo-Aramaic, Medieval Hebrew: , etc.; ), also spelled Banyas, is a site in the Golan Heights near a natural spring, once associated with the Greek god Pan. It had been inhabited for 2,000 years, until its Syrian population fle ...
,
Dothan,
Conroe,
Sandy Bridge
Sandy Bridge is the List of Intel codenames, codename for Intel's 32 nm process, 32 nm microarchitecture used in the second generation of the Intel Core, Intel Core processors (Intel Core i7, Core i7, Intel Core i5, i5, Intel Core i3, i3). The Sa ...
, and
Ivy Bridge, was primarily undertaken by Intel Israel at its engineering research center in
Haifa, Israel
Haifa ( ; , ; ) is the third-largest city in Israel—after Jerusalem and Tel Aviv—with a population of in . The city of Haifa forms part of the Haifa metropolitan area, the third-most populous metropolitan area in Israel. It is home to t ...
. The final design was largely an evolution of
Haswell, with minor improvements to performance and several power-saving features being added. A major priority of Skylake's design was to design a microarchitecture for envelopes as low as 4.5W to embed within
tablet computers
A tablet computer, commonly shortened to tablet, is a mobile device, typically with a mobile operating system and touchscreen display processing circuitry, and a rechargeable battery in a single, thin and flat package. Tablets, being computers ...
and
notebooks
A notebook is a small book often used for writing.
Notebook or The Notebook may also refer to:
Computing
*Laptop, a type of personal computer
**Notebook (laptop), a specific, smaller class of laptop
*Google Notebook, a discontinued online appli ...
in addition to higher-power
desktop computers
A desktop computer, often abbreviated as desktop, is a personal computer designed for regular use at a stationary location on or near a desk (as opposed to a portable computer) due to its size and power requirements. The most common configurati ...
and
servers.
In September 2014, Intel announced the Skylake microarchitecture at the
Intel Developer Forum
The Intel Developer Forum (IDF) was a biannual gathering of technologists to discuss Intel products and products based on Intel products. The first IDF was held in 1997.
To emphasize the importance of China, the Spring 2007 IDF was held in Beijin ...
in
San Francisco
San Francisco, officially the City and County of San Francisco, is a commercial, Financial District, San Francisco, financial, and Culture of San Francisco, cultural center of Northern California. With a population of 827,526 residents as of ...
, and that volume shipments of Skylake CPUs were scheduled for the second half of 2015. The Skylake development platform was announced to be available in Q1 2015. During the announcement, Intel also demonstrated two computers with desktop and mobile Skylake prototypes: the first was a desktop
testbed
A testbed (also spelled test bed) is a platform for conducting rigorous, transparent, and replicable testing of scientific theories, computing tools, and new technologies.
The term is used across many disciplines to describe experimental research ...
system, running the latest version of
3DMark
3DMark is a computer benchmarking tool created and developed by UL (formerly Futuremark), to determine the performance of a computer's 3D graphic rendering and CPU workload processing capabilities. Running 3DMark produces a 3DMark score, with ...
, while the second computer was a fully functional laptop, playing
4K video.
An initial batch of Skylake CPU models (i5-6600K and i7-6700K) was announced for immediate availability during the
Gamescom
Gamescom (stylized as ''gamescom'') is a trade fair for video games held annually at the Koelnmesse in Cologne, North Rhine-Westphalia, Germany. Gamescom is the world's largest gaming event, with 370,000 visitors and 1,037 exhibitors from 56 ...
on August 5, 2015,
unusually soon after the release of its predecessor, Broadwell, which had suffered from launch delays. Intel acknowledged in 2014 that moving from 22 nm (Haswell) to 14 nm (Broadwell) had been its most difficult process to develop yet, causing Broadwell's planned launch to slip by several months; yet, the 14 nm production was back on track and in full production as of Q3 2014. Industry observers had initially believed that the issues affecting Broadwell would also cause Skylake to slip to 2016, but Intel was able to bring forward Skylake's release and shorten Broadwell's release cycle instead.
As a result, the Broadwell architecture had an unusually short run.
Overclocking of unsupported processors
Officially Intel supported
overclocking
In computing, overclocking is the practice of increasing the clock rate of a computer to exceed that certified by the manufacturer. Commonly, operating voltage is also increased to maintain a component's operational stability at accelerated sp ...
of only the K and X versions of Skylake processors. However, it was later discovered that other non-K chips could be overclocked by modifying the base clock value – a process made feasible by the base clock applying only to the CPU, RAM, and integrated graphics on Skylake. Through beta UEFI firmware updates, some motherboard vendors, such as
ASRock
ASRock Inc. () is a Taiwanese manufacturer of motherboards, Industrial PC, industrial PCs and home theater PCs (HTPC).
Established in 2002, it is owned by PEGATRON, a company part of the ASUS group.
History
ASRock was originally spun off fro ...
(which prominently promoted it under the name Sky OC) allowed the base clock to be modified in this manner.
When overclocking unsupported processors using these UEFI firmware updates, several issues arise:
- C-states are disabled, therefore the CPU will constantly run at its highest frequency and voltage
- Turbo-boost is disabled
- Integrated graphics are disabled
AVX2
Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...
instruction performance is poor, approximately 4-5 times slower due to the upper 128-bit half of the execution units and data buses not being taken out of their power saving states
- CPU core temperature readings are incorrect
These issues are partly caused by the power management of the processor needing to be disabled for base clock overclocking to work.
In February 2016, however, an ASRock firmware update removed the feature. On February 9, 2016, Intel announced that it would no longer allow such overclocking of non-K processors, and that it had issued a CPU
microcode
In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. It consists of a set of hardware-level instructions ...
update that removes the function.
In April 2016, ASRock started selling motherboards that allow overclocking of unsupported CPUs using an external clock generator.
Operating system support
In January 2016, Microsoft announced that it would end support of
Windows 7
Windows 7 is a major release of the Windows NT operating system developed by Microsoft. It was Software release life cycle#Release to manufacturing (RTM), released to manufacturing on July 22, 2009, and became generally available on October 22, ...
and
Windows 8.1
Windows 8.1 is a release of the Windows NT operating system developed by Microsoft. It was released to manufacturing on August 27, 2013, and broadly released for retail sale on October 17, 2013, about a year after the retail release of its pr ...
on Skylake processors effective July 17, 2017; after this date, only the most critical updates for the two operating systems would be released for Skylake users if they have been judged not to affect the reliability of the OS on older hardware (until July 31, 2019; August 2019 critical update requires at least
Windows 10
Windows 10 is a major release of Microsoft's Windows NT operating system. The successor to Windows 8.1, it was Software release cycle#Release to manufacturing (RTM), released to manufacturing on July 15, 2015, and later to retail on July 2 ...
), and Windows 10 would be the only
Microsoft Windows
Windows is a Product lining, product line of Proprietary software, proprietary graphical user interface, graphical operating systems developed and marketed by Microsoft. It is grouped into families and subfamilies that cater to particular sec ...
platform officially supported on Skylake and on later Intel CPU microarchitectures beginning with Skylake's successor
Kaby Lake
Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's p ...
.
Terry Myerson
Terry Myerson (born 1972 or 1973) is an American venture partner at Madrona Venture Group and an operating executive at The Carlyle Group. Myerson was previously an Executive Vice President at Microsoft, and head of its Windows and Devices Group.
...
stated that Microsoft had to make a large investment in order to reliably support Skylake on older versions of Windows, and that future generations of processors would require further investments. Microsoft also stated that due to the age of the platform, it would be challenging for newer hardware, firmware, and device driver combinations to properly run under Windows 7.
On March 18, 2016, in response to criticism over the move, primarily from enterprise customers, Microsoft announced revisions to the support policy, changing the cutoff for support and non-critical updates to July 17, 2018, and stating that Skylake users would receive all critical security updates for Windows 7 and 8.1 through the end of extended support.
In August 2016, citing "a strong partnership with our OEM partners and Intel", Microsoft stated that it would continue to fully support 7 and 8.1 on Skylake through the end of their respective lifecycles. In addition, an enthusiast-created
modification
Modification may refer to:
* Modifications of school work for students with special educational needs
* Modifications (genetics), changes in appearance arising from changes in the environment
* Posttranslational modifications, changes to prote ...
was released that disabled the
Windows Update
Windows Update is a Microsoft service for the Windows 9x and Windows NT families of the Microsoft Windows operating system, which automates downloading and installing Microsoft Windows software updates over the Internet. The service delivers sof ...
check and allowed Windows 8.1 and earlier to continue to be updated on this and later platforms.
As of Linux kernel 4.10, Skylake mobile power management is supported with most Package C states supported seeing some use. Linux 4.11 enables Frame-Buffer Compression for the integrated graphics chipset by default, which lowers power consumption.
Skylake is fully supported on
OpenBSD
OpenBSD is a security-focused operating system, security-focused, free software, Unix-like operating system based on the Berkeley Software Distribution (BSD). Theo de Raadt created OpenBSD in 1995 by fork (software development), forking NetBSD ...
6.2 and later, including
accelerated graphics.
For
Windows 11
Windows 11 is a version of Microsoft's Windows NT operating system, released on October 5, 2021, as the successor to Windows 10 (2015). It is available as a free upgrade for devices running Windows 10 that meet the #System requirements, Windo ...
, only the high-end Skylake-X processors are officially listed as compatible. All other Skylake processors are not officially supported due to security concerns. However, it is still possible to manually upgrade using an ISO image (as Windows 10 users on those processors will not be offered to upgrade to Windows 11 via Windows Update), or perform a clean installation as long as the system has
Trusted Platform Module
A Trusted Platform Module (TPM) is a secure cryptoprocessor that implements the ISO/IEC 11889 standard. Common uses are verifying that the boot process starts from a trusted combination of hardware and software and storing disk encryption keys.
...
(TPM) 2.0 enabled, but the user must accept that they will not be entitled to receive updates, and that damage caused by using Windows 11 on an unsupported configuration are not covered by the manufacturer's warranty.
Features
Like its predecessor,
Broadwell, Skylake is available in five variants, identified by the
suffix
In linguistics, a suffix is an affix which is placed after the stem of a word. Common examples are case endings, which indicate the grammatical case of nouns and adjectives, and verb endings, which form the conjugation of verbs. Suffixes can ca ...
es S (''SKL-S''), X (''SKL-X''), H (''SKL-H''), U (''SKL-U''), and Y (''SKL-Y''). SKL-S and SKL-X contain
overclockable
In computing, overclocking is the practice of increasing the clock rate of a computer to exceed that certified by the manufacturer. Commonly, operating voltage is also increased to maintain a component's operational stability at accelerated sp ...
K and X variants with
unlocked multipliers. The H, U and Y variants are manufactured in
ball grid array
A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be pu ...
(BGA) packaging, while the S and X variants are manufactured in
land grid array
The land grid array (LGA) is a type of surface-mount packaging for integrated circuits (ICs) that is notable for having the pins on the socket (when a socket is used) — as opposed to pins on the integrated circuit, known as a '' pin grid array' ...
(LGA) packaging using a new socket,
LGA 1151
LGA 1151, also known as Socket H4, is a type of zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby L ...
(
LGA 2066
LGA 2066, also called ''Socket R4'', is a CPU socket by Intel that debuted with Skylake-X and Kaby Lake-X processors in June 2017. It replaces Intel's LGA 2011-3 (R3) in the performance, high-end desktop and Workstation platforms (based on the ...
for Skylake X).
Skylake is used in conjunction with
Intel 100 Series chipsets
This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those ...
, also known as ''Sunrise Point''.
The major changes between the Haswell and Skylake architectures include the removal of the
fully integrated voltage regulator
A voltage regulator module (VRM), sometimes called processor power module (PPM), is a buck converter that provides the microprocessor and chipset the appropriate supply voltage, converting , or to lower voltages required by the devices, allowi ...
(FIVR) introduced with Haswell. On the variants that will use a discrete
Platform Controller Hub
The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chipsa northbridge and southbridge, and first appeared in the Intel 5 Se ...
(PCH),
Direct Media Interface
In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge (or CPU) and southbridge (e.g. Platform Controller Hub family) chipset on a computer motherboard. It was first used between the 9xx chipsets and t ...
(DMI) 2.0 is replaced by
DMI 3.0, which allows speeds of up to 8
GT/s.
Skylake's U and Y variants support one
DIMM
A DIMM (Dual In-line Memory Module) is a popular type of memory module used in computers. It is a printed circuit board with one or both sides (front and back) holding DRAM chips and pins. The vast majority of DIMMs are manufactured in compl ...
slot per channel, while H and S variants support two DIMM slots per channel.
Skylake's launch and sales lifespan occur at the same time as the ongoing
SDRAM
Synchronous dynamic random-access memory (synchronous dynamic RAM or SDRAM) is any DRAM where the operation of its external pin interface is coordinated by an externally supplied clock signal.
DRAM integrated circuits (ICs) produced from the ...
market transition, with
DDR3 SDRAM
Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth (" double data rate") interface, and has been in use since 2007. It is the higher-spe ...
memory gradually being replaced by
DDR4 SDRAM
Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth (" double data rate") interface.
Released to the market in 2014, it is a variant of dynamic ra ...
. Rather than working exclusively with DDR4, the Skylake microarchitecture remains
backward compatible
In telecommunications and computing, backward compatibility (or backwards compatibility) is a property of an operating system, software, real-world product, or technology that allows for interoperability with an older legacy system, or with inpu ...
by interoperating with both types of memory. Accompanying the microarchitecture's support for both memory standards, a new SO-DIMM type capable of carrying either DDR3 or DDR4 memory chips, called
UniDIMM
UniDIMM (short for Universal DIMM) is a specification for dual in-line memory modules (DIMMs), which are printed circuit boards (PCBs) designed to carry dynamic random-access memory (DRAM) chips. UniDIMMs can be populated with either DDR3 or D ...
, was also announced.
Skylake's few P variants have a reduced on-die graphics unit (12 execution units enabled instead of 24 execution units) over their direct counterparts; see the table below. In contrast, with Ivy Bridge CPUs the P suffix was used for CPUs with completely disabled on-die video chipset.
Other enhancements include
Thunderbolt 3.0,
Serial ATA Express,
Iris Pro graphics with
Direct3D feature level 12_1 with up to 128 MB of L4
eDRAM
Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivale ...
cache on certain SKUs. The Skylake line of processors retires
VGA
Video Graphics Array (VGA) is a video display controller and accompanying de facto graphics standard, first introduced with the IBM PS/2 line of computers in 1987, which became ubiquitous in the IBM PC compatible industry within three years. T ...
support, while supporting up to three monitors connected via HDMI 1.4, DisplayPort 1.2 or Embedded DisplayPort (eDP) interfaces. HDMI 2.0 (
4K@60 Hz) is only supported on motherboards equipped with Intel's Alpine Ridge Thunderbolt controller.
The Skylake instruction set changes include
Intel MPX
Intel MPX (Memory Protection Extensions) are a discontinued set of extensions to the x86 instruction set architecture. With compiler, runtime library and operating system support, Intel MPX claimed to enhance security to software by checking poin ...
(Memory Protection Extensions) and
Intel SGX Intel Software Guard Extensions (SGX) is a set of instruction codes implementing trusted execution environment that are built into some Intel central processing units (CPUs). They allow user-level and operating system code to define protected priv ...
(Software Guard Extensions). Future Xeon variants will also have
Advanced Vector Extensions
Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...
3.2 (AVX-512F).
Skylake-based laptops were predicted to use wireless technology called
Rezence for charging, and other wireless technologies for communication with peripherals. Many major PC vendors agreed to use this technology in Skylake-based laptops; however, no laptops were released with the technology as of 2019.
The integrated GPU of Skylake's S variant supports on Windows
DirectX
Microsoft DirectX is a collection of application programming interfaces (APIs) for handling tasks related to multimedia, especially game programming and video, on Microsoft platforms. Originally, the names of these APIs all began with "Direct" ...
12 Feature Level 12_1,
OpenGL
OpenGL (Open Graphics Library) is a Language-independent specification, cross-language, cross-platform application programming interface (API) for rendering 2D computer graphics, 2D and 3D computer graphics, 3D vector graphics. The API is typic ...
4.6 with latest Windows 10 driver update (OpenGL 4.5 on Linux) and
OpenCL
OpenCL (Open Computing Language) is a software framework, framework for writing programs that execute across heterogeneous computing, heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs), di ...
3.0 standards. The
Quick Sync video engine now includes support for
VP9 (GPU accelerated decode only),
VP8
VP8 is an open format, open and royalty-free Video coding format, video compression format released by On2 Technologies in 2008.
Initially released as a Proprietary software, proprietary successor to On2's previous VP7 format, VP8 was released a ...
and
HEVC
High Efficiency Video Coding (HEVC), also known as H.265 and MPEG-H Part 2, is a video compression standard designed as part of the MPEG-H project as a successor to the widely used Advanced Video Coding (AVC, H.264, or MPEG-4 Part 10). In co ...
(hardware accelerated 8-bit encode/decode and GPU accelerated 10-bit decode), and supports for resolutions up to 40962048.
Intel also released unlocked (capable of overclocking) mobile Skylake CPUs.
Unlike previous generations, Skylake-based Xeon E3 no longer works with a desktop chipset that supports the same socket, and requires either the C232 or the C236 chipset to operate.
Started from Skylake, Intel had removed IDE mode (of SATA controller) and EHCI controller from its client platform chipsets.
Known issues
Short loops with a specific combination of instruction use may cause unpredictable system behavior on CPUs with hyperthreading. A
microcode
In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. It consists of a set of hardware-level instructions ...
update was issued to fix the issue.
Skylake is vulnerable to
Spectre
Spectre, specter or the spectre may refer to:
Religion and spirituality
* Vision (spirituality)
* Apparitional experience
* Ghost
Arts and entertainment Film and television
* ''Spectre'' (1977 film), a made-for-television film produced and writt ...
attacks.
In fact, it is more vulnerable than other processors because it uses indirect branch speculation not just on indirect branches but also when the return prediction stack underflows.
The latency for the
spinlock
In software engineering, a spinlock is a lock that causes a thread trying to acquire it to simply wait in a loop ("spin") while repeatedly checking whether the lock is available. Since the thread remains active but is not performing a useful tas ...
instruction has been increased dramatically (from the usual 10 cycles to 141 cycles in Skylake), which can cause performance issues with older programs or libraries using pause instructions. Intel documents the increased latency as a feature that improves power efficiency.
Architecture changes compared to Broadwell microarchitecture
CPU
* Improved front-end, deeper out-of-order buffers, improved
execution unit
In computer engineering, an execution unit (E-unit or EU) is a part of a processing unit that performs the operations and calculations forwarded from the instruction unit. It may have its own internal control sequence unit (not to be confused w ...
s, more execution units (third vector integer
ALU(VALU)) for five ALUs in total, more load/store
bandwidth
Bandwidth commonly refers to:
* Bandwidth (signal processing) or ''analog bandwidth'', ''frequency bandwidth'', or ''radio bandwidth'', a measure of the width of a frequency range
* Bandwidth (computing), the rate of data transfer, bit rate or thr ...
, improved
hyper-threading (wider retirement), speedup of AES-GCM and AES-CBC by 17% and 33% accordingly.
* Up to four cores as the default mainstream configuration
and up to 18 cores for X-series
*
AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
: F, CD, VL, BW, and DQ for Xeon Scalable and W variants, but not Xeon E3
*
Intel Memory Protection Extensions (MPX)
* Intel
Software Guard Extensions Intel Software Guard Extensions (SGX) is a set of instruction codes implementing trusted execution environment that are built into some Intel central processing units (CPUs). They allow user-level and operating system code to define protected priv ...
(SGX)
* Intel
Transactional Synchronization Extensions
Transactional Synchronization Extensions (TSX), also called Transactional Synchronization Extensions New Instructions (TSX-NI), is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding ...
(Disabled in 2021)
* Intel Speed Shift
* Larger
re-order buffer
A re-order buffer (ROB) is a hardware unit used in an extension to Tomasulo's algorithm to support out-of-order and speculative instruction execution. The extension forces instructions to be committed in-order.
The buffer is a circular buffer ...
(224 entries, up from 192)
*
L1 cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...
size unchanged at 32
KB instruction and 32 KB data cache per core.
*
L2 cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...
was changed from 8-way to 4-way set associative
* Voltage regulator module (
FIVR
A voltage regulator module (VRM), sometimes called processor power module (PPM), is a buck converter that provides the microprocessor and chipset the appropriate supply voltage, converting , or to lower voltages required by the devices, allowi ...
) is moved back to the motherboard
* Enhancements of Intel Processor Trace: fine-grained timing through CYC packets (cycle-accurate mode) and support for
Instruction Pointer
The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is ...
(IP) address filtering.
* 64 to 128 MB L4
eDRAM
Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivale ...
cache on certain SKUs
GPU
* Skylake's integrated
Gen9 GPU supports Direct3D 12 at the
feature level 12_1
* Vulkan 1.3 support (1.4 on Linux by Mesa 25.0)
* Full fixed function
HEVC
High Efficiency Video Coding (HEVC), also known as H.265 and MPEG-H Part 2, is a video compression standard designed as part of the MPEG-H project as a successor to the widely used Advanced Video Coding (AVC, H.264, or MPEG-4 Part 10). In co ...
Main/8bit encoding(only
4:2:0) and decoding acceleration (Level 5.1).
* Hybrid/Partial HEVC Main10/10bit decoding acceleration.
* Partial
VP9 decoding acceleration.
*
JPEG
JPEG ( , short for Joint Photographic Experts Group and sometimes retroactively referred to as JPEG 1) is a commonly used method of lossy compression for digital images, particularly for those images produced by digital photography. The degr ...
encoding acceleration for resolutions up to 16,000×16,000 pixels.
* Offloading some media decoding functionality to HEVC/H.265 micro controller (HuC)
*
Frame Buffer Compression
A frame is often a structural system that supports other components of a physical construction and/or steel frame that limits the construction's extent.
Frame and FRAME may also refer to:
Physical objects
In building construction
*Framing (co ...
(FBC)
* Up to 72 Execution Units (from 48)
* Add
Multiplane Overlay Multiplane can refer to:
*Multiplane camera, a motion-picture camera used in the traditional animation process
*Multiplane (aeronautics)
In aviation, a multiplane is a fixed-wing aircraft-configuration featuring multiple wing planes. The wing pla ...
(MPO)
* 16-bit float support
I/O
*
LGA 1151
LGA 1151, also known as Socket H4, is a type of zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby L ...
socket for mainstream desktop processors and
LGA 2066
LGA 2066, also called ''Socket R4'', is a CPU socket by Intel that debuted with Skylake-X and Kaby Lake-X processors in June 2017. It replaces Intel's LGA 2011-3 (R3) in the performance, high-end desktop and Workstation platforms (based on the ...
socket for enthusiast gaming/workstation X-series processors
* 100-series chipset (
Sunrise Point)
* X-series uses X299-series chipset
*
DMI 3.0
In computing, Direct Media Interface (DMI) is Intel's proprietary link between the Northbridge (computing), northbridge (or CPU) and Southbridge (computing), southbridge (e.g. Platform Controller Hub family) chipset on a computer motherboard. It ...
(From
DMI 2.0)
* Support for both
DDR3L
Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed ...
SDRAM and
DDR4 SDRAM
Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth (" double data rate") interface.
Released to the market in 2014, it is a variant of dynamic ra ...
in mainstream variants, using custom
UniDIMM
UniDIMM (short for Universal DIMM) is a specification for dual in-line memory modules (DIMMs), which are printed circuit boards (PCBs) designed to carry dynamic random-access memory (DRAM) chips. UniDIMMs can be populated with either DDR3 or D ...
SO-DIMM form factor
with up to 64
GB of
RAM
Ram, ram, or RAM most commonly refers to:
* A male sheep
* Random-access memory, computer memory
* Ram Trucks, US, since 2009
** List of vehicles named Dodge Ram, trucks and vans
** Ram Pickup, produced by Ram Trucks
Ram, ram, or RAM may also ref ...
on
LGA 1151
LGA 1151, also known as Socket H4, is a type of zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby La ...
variants. Usual
DDR3
Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high Bandwidth (computing), bandwidth ("double data rate") interface, and has been in use since 2007. ...
memory is also supported by certain motherboard vendors even though Intel does not officially support it.
* Support for 16
PCI Express
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripher ...
3.0 lanes from CPU, 20
PCI Express
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripher ...
3.0 lanes from PCH (LGA 1151), 44
PCI Express
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripher ...
3.0 lanes for Skylake-X
* Support for
Thunderbolt 3
Thunderbolt is the brand name of a hardware interface for the connection of external peripherals to a computer. It was developed by Intel in collaboration with Apple. It was initially marketed under the name Light Peak, and first sold as part ...
(Alpine Ridge)
* Add
NVMe
NVM Express (NVMe) or Non-Volatile Memory Host Controller Interface Specification (NVMHCIS) is an open, logical-device interface specification for accessing a computer's non-volatile storage media usually attached via the PCI Express bus. The in ...
PCIe 3.0
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as PCI, PCI ...
x4 support through chipset
Other
*
Thermal design power (TDP) up to 95 W (LGA 1151); up to 165 W (LGA 2066)
*
14 nm
The "14 nanometer process" refers to a marketing term for the MOSFET technology node that is the successor to the "22nm" (or "20nm") node. The "14nm" was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about ...
manufacturing process
Configurations
Skylake processors are produced in seven main families: Y, U, H, S, X, W, and SP. Multiple configurations are available within each family:
List of Skylake processor models
Mainstream desktop processors
Common features of the mainstream desktop Skylake CPUs:
*
DMI 3.0
In computing, Direct Media Interface (DMI) is Intel's proprietary link between the Northbridge (computing), northbridge (or CPU) and Southbridge (computing), southbridge (e.g. Platform Controller Hub family) chipset on a computer motherboard. It ...
and
PCIe 3.0
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as PCI, PCI ...
interfaces
* Dual-channel memory support in the following configurations: DDR3L-1600 1.35 V (32 GB maximum) or DDR4-2133 1.2 V (64 GB maximum). DDR3 is unofficially supported through some motherboard vendors
* 16
PCIe 3.0
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as PCI, PCI ...
lanes
* The Core-branded processors support the AVX2 instruction set. The Celeron and Pentium-branded ones support only SSE4.1/4.2
* 350 MHz base graphics clock rate
High-end desktop processors (Skylake-X)
Common features of the high-performance Skylake-X CPUs:
* In addition to the AVX2 instruction set, they also support the
AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
instructions
* No built-in iGPU (integrated graphics processor)
* Turbo Boost Max Technology 3.0 for up to two/four threads workloads for CPUs that have eight cores and more (7820X, 7900X, 7920X, 7940X, 7960X, 7980XE, and all ninth generation chips)
* A different cache hierarchy (when compared to client Skylake CPUs or previous architectures)
Xeon high-end desktop processors (Skylake-X)
* Marketed as a Xeon
* Uses the C621 chipset
* Xeon W-3175X was the only Xeon with a multiplier officially unlocked for
overclocking
In computing, overclocking is the practice of increasing the clock rate of a computer to exceed that certified by the manufacturer. Commonly, operating voltage is also increased to maintain a component's operational stability at accelerated sp ...
until the introduction of
Sapphire Rapids-WS Xeon CPUs in 2023.
Mobile processors
''For mobile workstation processors, see
Server processors''
Workstation processors
* All models support: ''
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
SSSE3
Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.
History
SSSE3 was first introduced with Intel processors based on the Core microarchitect ...
,
SSE4.1
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core (microarchitecture), Core microarchitecture and AMD K10, AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with va ...
,
SSE4.2,
AVX AVX may refer to:
Computing
* Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture
** AVX2, an expansion of the AVX instruction set
** AVX-512, 512-bit extensions to the 256-bit AVX
* Softwin AVX (AntiViru ...
,
AVX2
Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...
,
AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
,
FMA3
The FMA instruction set is an extension to the 128- and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations. There are two variants:
* FMA4 is supported in AM ...
,
MPX, Enhanced Intel
SpeedStep
Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel's microprocessors that allow the clock speed of the processor to be ...
Technology (EIST),
Intel 64
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit extension of the x86 instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduces two new operating modes: 64-bit mode an ...
, XD bit (an
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
implementation),
Intel VT-x
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
,
Intel VT-d
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
,
Turbo Boost
Intel Turbo Boost is Intel's trade name for central processing units' (CPUs') dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher result ...
(excluding W-2102 and W-2104),
Hyper-threading (excluding W-2102 and W-2104),
AES-NI
An Advanced Encryption Standard instruction set (AES instruction set) is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern proces ...
,
Intel TSX-NI, Smart Cache.''
* PCI Express lanes: 48
* Supports up to eight DIMMs of DDR4 memory, maximum 512 GB.
Server processors
E3 series server chips all consist of System Bus 9 GT/s, maximum memory bandwidth of 34.1
GB/s dual channel memory. Unlike its predecessor, the Skylake Xeon CPUs require C230 series (C232/C236) or C240 series (C242/C246) chipset to operate, with integrated graphics working only with C236 and C246 chipsets. Mobile counterparts uses CM230 and CM240 series chipsets.
Skylake-SP (14 nm) Scalable Performance
* Xeon Platinum supports up to eight sockets. Xeon Gold supports up to four sockets. Xeon Silver and Bronze support up to two sockets.
** −M: 1536 GB RAM per socket instead of 768 GB RAM for ''non''−M SKUs
** −F: integrated
OmniPath fabric
** −T: High thermal-case and extended reliability
* Support for up to 12
DIMM
A DIMM (Dual In-line Memory Module) is a popular type of memory module used in computers. It is a printed circuit board with one or both sides (front and back) holding DRAM chips and pins. The vast majority of DIMMs are manufactured in compl ...
s of
DDR4
Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth ("double data rate") interface.
Released to the market in 2014, it is a variant of dynamic rando ...
memory per CPU socket.
* Xeon Platinum, Gold 61XX, and Gold 5122 have two
AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
FMA units per core. Xeon Gold 51XX (except 5122), Silver, and Bronze have a single
AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
FMA unit per core.
Xeon Bronze and Silver (dual processor)
* Xeon Bronze 31XX has no HT or Turbo Boost support.
* Xeon Bronze 31XX supports DDR4-2133 MHz RAM. Xeon Silver 41XX supports DDR4-2400 MHz RAM.
* Xeon Bronze 31XX and Xeon Silver 41XX support two UPI links at 9.6 GT/s.
Xeon Gold (quad processor)
* Xeon Gold 51XX and F SKUs has two UPIs at 10.4 GT/s. Xeon Gold 61XX has three UPIs at 10.4 GT/s.
* Xeon Gold 51XX support DDR4-2400 MHz RAM (except 5122). Xeon Gold 5122 and 61XX support DDR4-2666 MHz RAM.
File:Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 DSCx1.jpg, Intel Skylake Xeon gold processor
File:Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 DSCx3.jpg, Intel Skylake Xeon gold processor, delidded
File:Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 [email protected], Die shot
Xeon Platinum (octal processor)
* Xeon Platinum non-F SKUs have three UPIs at 10.4 GT/s. Xeon Platinum F-SKUs have two UPIs at 10.4 GT/s.
* Xeon Platinum supports DDR4-2666 MHz RAM.
See also
*
List of Intel CPU microarchitectures
The following is a ''partial'' list of Intel CPU microarchitectures. The list is ''incomplete'', additional details can be found in Intel's tick–tock model, process–architecture–optimization model and Template:Intel processor roadmap.
x86 ...
References
External links
*
*
*
{{IntelProcessorRoadmap
Skylake microarchitecture
Intel microarchitectures
Transactional memory
X86 microarchitectures
Computer-related introductions in 2015