The CRUVI FPGA Card is a daughter card standard of Standardization Group for Embedded Technologies e.V. (SGET) specifically tailored to the needs of

FPGA A field-programmable gate array (FPGA) is a type of configurable integrated circuit that can be repeatedly programmed after manufacturing. FPGAs are a subset of logic devices referred to as programmable logic devices (PLDs). They consist of a ...

Background

The expansion bus interface is designed to create an open ecosystem of function modules for high-performance peripheral connectivity. Its main focus is on supporting FPGA and FPGA SoC devices from all major manufacturers like

Altera Altera Corporation is a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015 before becoming independent once again in 2025 as a company focused on developm ...

, Lattice,

Microchip An integrated circuit (IC), also known as a microchip or simply chip, is a set of electronic circuits, consisting of various electronic components (such as transistors, resistors, and capacitors) and their interconnections. These components a ...

and

Xilinx Xilinx, Inc. ( ) was an American technology and semiconductor company that primarily supplied programmable logic devices. The company is renowned for inventing the first commercially viable field-programmable gate array (FPGA). It also pioneered ...

. The word "CRUVI" is a combination of the Estonian word "KRUVI" for screw and the letter "C", which refers to the half of the hexagonal screw head. In this case, the "K" was replaced with "C" to emphasize the reference to the screw head.

Overview

It can be used to build high performance prototypes, for system integration and testing to build complex systems from smaller building blocks to iterate quickly and reduce cost. Create custom test systems for production functional testing. It´s a perfect platform for your next high-performance semiconductor evaluation boards and systems. The carrier module supplies the power supply, the input/output voltage and controls the functions of the peripheral modules. The CRUVI open standard coexists between low speed, low pin-count like Pmod Interface devices and high-performance, high pin-count (HPC), 400 I/O FPGA Mezzanine Card (FMC) peripherals. Three board-to-board connectors are specified: CRUVI-LS (Low Speed), CRUVI-HS (High Speed) and CRUVI-GT ( Gigabit Transceiver)

PCIe PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripher ...

Gen 5.0 capable. Bridging adapter exists to convert signals from Pmod to CRUVI-LS (CR00025), from FMC to CRUVI-HS (CR00101, CR00111) and FMC to CRUVI-GT (CR00112).

History of CRUVI specification

International contributors to define the open source CRUVI specification are Trenz Electronic GmbH, Arrow Electronics, Samtec,

Flinders University Flinders University, established as The Flinders University of South Australia is a public university, public research university based in Adelaide, South Australia, with a footprint extending across a number of locations in South Australia and ...

, Synaptic Laboratories Ltd, Symbiotic EDA and MicroFPGA UG. The Standardization Group for Embedded Technologies e.V. (SGET) launches its call for participation to establish a new Standard Development Team (SDT) for the FPGA Peripheral Module standard with the working title sCRUVI. The founding meeting of the Standard Development Team (SDT.07) for FPGA Peripheral Modules was on May 6th 2025. This initiative aims to set a groundbreaking standard for peripheral modules used in FPGA and FPGA-SoC-based systems.

Structure and description of the carrier modules

Single, double or triple width modules are allowed and they have more mounting holes. A triple size of space on carrier board is 67.72 x 57.5 mm² (2.66535 x 2.26378 inch²). There are 3 slots. The mounting holes (1 to 6) for M2 screws are 2.2 mm (0.0866 inch) diameter and need SMD spacer for mechanically fixing. The CR99201 PCB template has LS and HS connectors named: AX, BY and CZ. The CR99500 PCB template has LS, HS and GT connectors. file:CR99210_triple_maximum_size_carrier_board.jpg file:Triple_maximum_size_carrier_board_67.72_x_57.5.jpg file:CR99500-1_triple_maximum_size_carrier_board.jpg file:CR99500_Triple_maximum_size_carrier_board_67.72_x_57.5.jpg It is recommended for all FPGA host boards with CRUVI slots provide LiteX platform support files.

Structure and description of the peripheral modules

There are different single peripheral module possible, flexible and scalable by size LS, HS and GT connectors. Mounting holes are for M2 screws 2.2 mm (0.0866 inch) diameter.

CRUVI connector specification

peripheral board specification

There are different single peripheral module possible, flexible and scalable by size LS, HS and GT connectors. Mounting holes are for M2 screws 2.2 mm (0.0866 inch) diameter. It is recommended to have

EEPROM EEPROM or E2PROM (electrically erasable programmable read-only memory) is a type of non-volatile memory. It is used in computers, usually integrated in microcontrollers such as smart cards and remote keyless systems, or as a separate chip d ...

with I2C for identification of peripheral module with a specific address number.

LS Low Speed, HS High Speed and GT Gigabit Transceiver connector

CRUVI-LS pinout and signal description

CRUVI-HS pinout and signal description

CRUVI-GT pinout and signal description

References

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External links

CRUVI Webpage

Trenz Electronic develops and manufactures CRUVI + FPGA (SoC) modules for business and science

Trenz Electronic and their partners created a new FPGA expansion bus called CRUVI
published 2023-05-11
Arrow reveals first Dev Board for Intel Agilex 5 FPGAs, with two more boards planned
published 2023-11-27
Software is integrated into VHDPlus IDE for CRUVI solutionsSynaptic Laboratories Ltd (SLL) is contributor to the exciting open source CRUVI standard for memory controller and related technologies. i.e. HyperBus, OctaBus, Xccela Bus and JEDEC xSPI memory