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Xilleon
Xilleon is a brand for a family of SoCs combining a low-power CPU with ASICs for accelerated video decompression and further functions for major worldwide broadcast networks (including PAL, NTSC, SECAM and ATSC) targeting digital television (i.e. products like set-top boxes, Integrated digital television, digital television adapters, smart TVs, etc.). Technical features Most Xilleon-branded SoCs have a * 300 MHz MIPS 4Kc ( MMU, no FPU) * ASIC simultaneously decompressing two standard-definition television and two high-definition television MPEG-2-compressed streams * two display controller * 2D and 3D graphics engine * conditional access * transport demultiplexers * 32/64 bit DDR/SDR interface * PCI, USB, IR, I2C, I2S, Flash and PATA interfaces It was revealed that the next generation of AVIVO, named as '' Unified Video Decoder'' (UVD) was based on Xilleon video processor to provide hardware decoding of H.264, and VC-1 video codec standards. Both AMD TrueAudio ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Xilleon Layout
Xilleon is a brand for a family of SoCs combining a low-power CPU with ASICs for accelerated video decompression and further functions for major worldwide broadcast networks (including PAL, NTSC, SECAM and ATSC) targeting digital television (i.e. products like set-top boxes, Integrated digital television, digital television adapters, smart TVs, etc.). Technical features Most Xilleon-branded SoCs have a * 300 MHz MIPS 4Kc ( MMU, no FPU) * ASIC simultaneously decompressing two standard-definition television and two high-definition television MPEG-2-compressed streams * two display controller * 2D and 3D graphics engine * conditional access * transport demultiplexers * 32/64 bit DDR/SDR interface * PCI, USB, IR, I2C, I2S, Flash and PATA interfaces It was revealed that the next generation of AVIVO, named as ''Unified Video Decoder'' (UVD) was based on Xilleon video processor to provide hardware decoding of H.264, and VC-1 video codec standards. Both AMD TrueAudio and ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Amd Xilleon
Advanced Micro Devices, Inc. (AMD) is an American multinational corporation and technology company headquartered in Santa Clara, California and maintains significant operations in Austin, Texas. AMD is a hardware and fabless company that designs and develops central processing units (CPUs), graphics processing units (GPUs), field-programmable gate arrays (FPGAs), system-on-chip (SoC), and high-performance computer solutions. AMD serves a wide range of business and consumer markets, including gaming, data centers, artificial intelligence (AI), and embedded systems. AMD's main products include microprocessors, motherboard chipsets, embedded processors, and graphics processors for servers, workstations, personal computers, and embedded system applications. The company has also expanded into new markets, such as the data center, gaming, and high-performance computing markets. AMD's processors are used in a wide range of computing devices, including personal computers, servers, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Unified Video Decoder
Unified Video Decoder (UVD, previously called Universal Video Decoder) is the name given to AMD's dedicated video decoding ASIC. There are multiple versions implementing a multitude of video codecs, such as H.264 and VC-1. UVD was introduced with the Radeon HD 2000 Series and is integrated into some of AMD's GPUs and APUs. UVD occupies a considerable amount of the die surface at the time of its introduction and is not to be confused with AMD's Video Coding Engine (VCE). As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN). Overview The UVD is based on an ATI Xilleon video processor, which is incorporated onto the same die as the GPU and is part of the ATI Avivo HD for hardware video decoding, along with the Advanced Video Processor (AVP). UVD, as stated by AMD, handles decoding of H.264/AVC, and VC-1 video codecs entirely in hardware. The UVD technology is based on the Cadence Tensilica Xtensa processor, which was originall ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
AVIVO
ATI Avivo is a set of hardware and low level software features present on the ATI Radeon R520 family of GPUs and all later ATI Radeon products. ATI Avivo was designed to offload video decoding, encoding, and post-processing from a computer's CPU to a compatible GPU. ATI Avivo compatible GPUs have lower CPU usage when a player and decoder software that support ATI Avivo is used. ATI Avivo has been long superseded by Unified Video Decoder (UVD) and Video Coding Engine (VCE). Background The GPU wars between ATI and NVIDIA have resulted in GPUs with ever-increasing processing power since early 2000s. To parallel this increase in speed and power, both GPU makers needed to increase video quality as well, in 3D graphics applications the focus in increasing quality has mainly fallen on anti-aliasing and anisotropic filtering. However it has dawned upon both companies that video quality on the PC would need improvement as well and the current APIs provided by both companies h ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Memory Management Unit
A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit that examines all references to computer memory, memory, and translates the memory addresses being referenced, known as virtual memory addresses, into physical addresses in main memory. In modern systems, programs generally have addresses that access the theoretical maximum memory of the computer architecture, 32 or 64 bits. The MMU maps the addresses from each program into separate areas in physical memory, which is generally much smaller than the theoretical maximum. This is possible because programs rarely use large amounts of memory at any one time. Most modern operating systems (OS) work in concert with an MMU to provide virtual memory (VM) support. The MMU tracks memory use in fixed-size blocks known as ''pages''. If a program refers to a location in a page that is not in physical memory, the MMU sends an interrupt to the operating system. The OS selects a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Digital Video Broadcasting
Digital Video Broadcasting (DVB) is a set of international open standards for digital television. DVB standards are maintained by the DVB Project, an international industry consortium, and are published by a Joint Technical Committee (JTC) of the European Telecommunications Standards Institute (ETSI), European Committee for Electrotechnical Standardization (CENELEC) and European Broadcasting Union (EBU). Transmission DVB systems distribute data using a variety of approaches, including: * Satellite: DVB-S, DVB-DSNG, DVB-S2, DVB-S2X and DVB-SH ** DVB-SMATV for distribution via SMATV * Cable: DVB-C, DVB-C2 * Terrestrial television: DVB-T, DVB-T2 ** Digital terrestrial television for handhelds: DVB-H, DVB-SH * Microwave: using DTT ( DVB-MT), the MMDS ( DVB-MC), and/or MVDS standards ( DVB-MS) These standards define the physical layer and data link layer of the distribution system. Devices interact with the physical layer via a synchronous parallel interface ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Tensilica
Tensilica Inc. was a company based in Silicon Valley that developed semiconductor intellectual property (SIP) cores. Tensilica was founded in 1997 by Chris Rowen. In April 2013, the company was acquired by Cadence Design Systems for approximately $326 million. Products Cadence Tensilica develops SIP blocks to be included in chip (IC) designs of products of their licensees, such as system on a chip architectures for embedded systems. Tensilica processors are delivered as synthesizable RTL to aid integration with other designs. Xtensa configurable cores Xtensa processors range from small, low-power cache-less microcontroller to more performance-oriented SIMD processors, multiple-issue VLIW DSP cores, and neural network processors. Cadence standard DSPs are based on the Xtensa architecture. The architecture offers a user-customizable instruction set through automated customization tools that can extend the base instruction set, including and not limited to, addition of new ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
AMD TrueAudio
TrueAudio is AMDs application-specific integrated circuit (ASIC) intended to serve as dedicated co-processor for the calculations of computationally expensive advanced audio signal processing, such as convolution reverberation effects and 3D audio effects. TrueAudio is integrated into some of the AMD GPUs and APUs available since 2013. Overview TrueAudio is a DSP for audio based on Cadence Tensilica HiFi EP DSP with Tensilica Xtensa SP float support. AMD claimed that a few simple audio effects can use up to 14% of the CPU. Audiokinetic claimed that it is up to 10%. Independent software vendors (ISV), such as game developers, can use what is called a Wwise audio plugin to offload such computations to the TrueAudio DSPs. The on- die TrueAudio DSPs provide a better "silicon area to computing power" ratio and "power consumption to computing power" ratio for audio processing than the CPU, effectively making it an audio acceleration unit. On 18 March 2014, AnandTech evalua ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Video Codec
A video codec is software or Computer hardware, hardware that data compression, compresses and Uncompressed video, decompresses digital video. In the context of video compression, ''codec'' is a portmanteau of ''encoder'' and ''decoder'', while a device that only compresses is typically called an ''Encoder (digital), encoder'', and one that only decompresses is a ''decoder''. The compressed data format usually conforms to a standard video coding format. The compression is typically lossy, meaning that the compressed video lacks some information present in the original video. A consequence of this is that decompressed video has lower quality than the original, uncompressed video because there is insufficient information to accurately reconstruct the original video. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
VC-1
SMPTE 421, informally known as VC-1, is a video coding format. Most of it was initially developed as Microsoft's proprietary video format Windows Media Video 9 in 2003. With some enhancements including the development of a new Advanced Profile, it was officially approved as an SMPTE standard on April 3, 2006. It was primarily marketed as a lower-complexity competitor to the H.264/MPEG-4 AVC standard. After its development, several companies other than Microsoft asserted that they held patents that applied to the technology, including Panasonic, LG Electronics and Samsung Electronics. VC-1 is supported in the now-deprecated Microsoft Silverlight, the briefly-offered HD DVD disc format, and the Blu-ray Disc format. Format VC-1 is an evolution of the conventional block-based motion-compensated hybrid video coding design also found in H.261, MPEG-1 Part 2, H.262/MPEG-2 Part 2, H.263, and MPEG-4 Part 2. It was widely characterized as an alternative to the ITU-T and MPEG video ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Parallel ATA
Parallel ATA (PATA), originally , also known as Integrated Drive Electronics (IDE), is a standard interface designed for IBM PC-compatible computers. It was first developed by Western Digital and Compaq in 1986 for compatible hard drives and CD or DVD drives. The connection is used for storage devices such as hard disk drives, floppy disk drives, optical disc drives, and tape drives in computers. The standard is maintained by the X3/INCITS committee. It uses the underlying (ATA) and Packet Interface ( ATAPI) standards. The Parallel ATA standard is the result of a long history of incremental technical development, which began with the original AT Attachment interface, developed for use in early PC AT equipment. The ATA interface itself evolved in several stages from Western Digital's original Integrated Drive Electronics (IDE) interface. As a result, many near-synonyms for ATA/ATAPI and its previous incarnations are still in common informal use, in particular Extended I ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
Video Display Controller
A video display controller (VDC), also called a display engine or display interface, is an integrated circuit which is the main component in a video-signal generator, a device responsible for the production of a TV video signal in a computing or game system. Some VDCs also generate an audio signal, but that is not their main function. VDCs were used in the home computers of the 1980s and also in some early video picture systems. The VDC is the main component of the video signal generator logic, responsible for generating the timing of video signals such as the horizontal and vertical synchronization signals and the blanking interval signal. Sometimes other supporting chips were necessary to build a complete system, such as RAM to hold pixel data, ROM to hold character fonts, or some discrete logic such as shift registers. Most often the VDC chip is completely integrated in the logic of the main computer system, (its video RAM appears in the memory map of the main CPU), ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] [Amazon] |
