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PCI IDE ISA Xcelerator
PCI IDE ISA Xcelerator (PIIX), also known as Intel 82371, is a family of Intel southbridge microchips employed in some Intel chipsets. x86 virtualization implementations often support emulations of various PIIX-based chipsets. Versions PIIX The PIIX integrated an IDE controller with two 8237 DMA controllers, the 8254 PIT, and two 8259 PICs and a PCI to ISA bus bridge. It was introduced with the 430FX Triton chipset in 1995. The mobile version was introduced with the 430MX mobile Triton chipset. The following variations existed: *82371FB (PIIX) *82371MX (MPIIX) Mobile PIIX3 The PIIX3 introduced a USB 1.0 controller and support for an external I/O APIC. It was used with the 430HX and 430VX Triton II and 440FX northbridges. The following variations existed: *82371SB (PIIX3) Gallery File:Intel sb82371sb su093.jpg, Intel SB82371SB (PIIX3) PIIX4 The PIIX4 introduced ACPI support, an improved IDE controller with Ultra DMA/33 support, and an integrated MC146818 style ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and Delaware General Corporation Law, incorporated in Delaware. Intel designs, manufactures, and sells computer components such as central processing units (CPUs) and related products for business and consumer markets. It is one of the world's List of largest semiconductor chip manufacturers, largest semiconductor chip manufacturers by revenue, and ranked in the Fortune 500, ''Fortune'' 500 list of the List of largest companies in the United States by revenue, largest United States corporations by revenue for nearly a decade, from 2007 to 2016 Fiscal year, fiscal years, until it was removed from the ranking in 2018. In 2020, it was reinstated and ranked 45th, being the List of Fortune 500 computer software and information companies, 7th-largest technology company in the ranking. It was one of the first companies listed on Nasdaq. Intel supplies List of I ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel 440FX
The Intel 440FX (codenamed Natoma), is a chipset from Intel, supporting the Pentium Pro and Pentium II processors. It is the first chipset from Intel that supports Pentium II. It is also known as i440FX and was released in May 1996. Official part numbers include the 82441FX and the 82442FX. The 440FX chipset does not support UltraDMA, SDRAM, or AGP. The chipset contains the northbridge chip "440FX PCIset - 82441FX PCI and Memory Controller (PMC)" and the data bus accelerator (DBX) "82442FX". Its southbridge counterpart is the PIIX3. It was replaced by Intel 440LX. The designers of the QEMU emulator originally chose to simulate this chipset and its southbridge counterpart PIIX3. Gallery File:Intel sb82441fx su053.jpg, Intel 82441FX PCI and Memory Controller (PMC) File:Intel sb82442fx su054.jpg, Intel 82442FX Data Bus Accelerator (DBX) See also * PCI bus bridges * List of Intel chipsets This article provides a list of motherboard chipsets made by Intel, divided into thr ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Southbridge (computing)
In computing, a southbridge is a component of a traditional two-part chipset architecture on motherboards, historically used in personal computers. It works alongside the northbridge to manage communications between the central processing unit (CPU) and lower-speed peripheral interfaces. The northbridge typically handled high-speed connections such as RAM and GPU interfaces, while the southbridge managed lower-speed functions. The southbridge controls a range of input/output (I/O) functions, including USB, audio, firmware (e.g., BIOS or UEFI), storage interfaces such as SATA, NVMe, and legacy PATA, as well as buses like PCI, LPC, and SPI. Southbridge and northbridge components were often designed to work in pairs, though there was no universal standard for interoperability. In the 1990s and early 2000s, they commonly communicated via the PCI bus; more recent chipsets use Direct Media Interface (Intel) or PCI Express (AMD). Intel referred to its southbridge as the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Super I/O
Super I/O (sometimes Multi-IO) is a class of I/O controller integrated circuits that began to be used on personal computer motherboards in the late 1980s, originally as add-in cards, later embedded on the motherboards. A super I/O chip combines interfaces for a variety of low-bandwidth devices. Now it is mostly merged with EC. Functions The functions below are usually provided by the super I/O if they are on the motherboard: * A floppy-disk controller * An IEEE 1284-compatible parallel port (commonly used for printers) * One or more 16C550-compatible serial port UARTs * Keyboard controller for PS/2 keyboard and/or mouse Most Super I/O chips include some additional low-speed devices, such as: * Temperature, voltage, and fan speed interface * Connect temperature and voltage sensors via SMBus * Thermal Zone * Chassis intrusion detection * Mainboard power management, including control voltage regulator module * LED management * PWM fan speed control * An IrDA Port cont ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
I/O Controller Hub
I/O Controller Hub (ICH) is a family of Intel Corporation, Intel southbridge (computing), southbridge microchips used to manage I/O, data communications between a CPU and a motherboard, specifically Intel chipsets based on the Intel Hub Architecture. It is designed to be paired with a second support chip known as a northbridge (computing), northbridge. As with any other southbridge, the ICH is used to connect and control peripheral devices. As CPU speeds increased data transmission between the CPU and support chipset, the support chipset eventually emerged as a wikt:bottleneck, bottleneck between the processor and the motherboard. Accordingly, starting with the 2008 Intel 5 Series, a new architecture was used that incorporated some functions of the traditional north and south bridge chips onto the CPU itself, with the remaining functions being consolidated into a single Platform Controller Hub (PCH) and therefore replacing the traditional two chip setup. ICH The first version of ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System Controller Hub
System Controller Hub (SCH) is a family of Intel microchips employed in chipsets for low-power Atom-based platforms. Its architecture is consistent with the Intel Hub Architecture but combines the traditional northbridge and southbridge functions into a single microchip. Poulsbo Poulsbo is the codename of the first SCH and plays a key role in Intel's second-generation Menlow UMPC and MID platform chipset for Atom Silverthorne microprocessors. The graphics core is called GMA 500 and unlike most graphics cores used by Intel was developed by Imagination Technologies. Intel licensed the PowerVR SGX 535 as a graphics core and the PowerVR VXD370 for H.264/MPEG-4 AVC playback. The video core is able to process 720p as well as 1080i resolutions. This has the following variations: SCH UL11LSCH US15LSCH US15WSCH US15WPSCH US15WPTSCH US15X GMA 500 Linux support Although several netbooks using the Poulsbo chipset are shipped with some distribution of Linux (notably the Sony Vaio P ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Platform Controller Hub
The Platform Controller Hub (PCH) is a family of Intel's single-chip chipsets, first introduced in 2009. It is the successor to the Intel Hub Architecture, which used two chipsa northbridge and southbridge, and first appeared in the Intel 5 Series. The PCH controls certain data paths and support functions used in conjunction with Intel CPUs. These include clocking (the system clock), Flexible Display Interface (FDI) and Direct Media Interface (DMI), although FDI is used only when the chipset is required to support a processor with integrated graphics. As such, I/O functions are reassigned between this new central hub and the CPU compared to the previous architecture: some northbridge functions, the memory controller and PCIe lanes, were integrated into the CPU while the PCH took over the remaining functions in addition to the traditional roles of the southbridge. AMD has its equivalent for the PCH, known simply as a chipset since the release of the Zen architecture in 2017. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
List Of Intel Chipsets
This article provides a list of motherboard chipsets made by Intel, divided into three main categories: those that use the PCI bus for interconnection (the 4xx series), those that connect using specialized "hub links" (the 8xx series), and those that connect using PCI Express (the 9xx series). The chipsets are listed in chronological order. Pre-chipset situation An earlier chipset support for Intel 8085 microprocessor can be found at MCS-85 family section. Early IBM XT-compatible mainboards did not yet have a chipset, but relied instead on a collection of discrete TTL chips by Intel: * the 8284 clock generator * the 8288 bus controller * the 8254 programmable interval timer * the 8255 parallel I/O interface * the 8259 programmable interrupt controller * the 8237 DMA controller Early chipsets To integrate the functions needed on a mainboard into a smaller number of ICs, Intel licensed the ZyMOS POACH chipset for its Intel 80286 and Intel 80386SX processors (the 8223 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Itanium
Itanium (; ) is a discontinued family of 64-bit computing, 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). The Itanium architecture originated at Hewlett-Packard (HP), and was later jointly developed by HP and Intel. Launching in June 2001, Intel initially marketed the processors for enterprise servers and high-performance computing systems. In the concept phase, engineers said "we could run circles around PowerPC...we could kill the x86". Early predictions were that IA-64 would expand to the lower-end servers, supplanting Xeon, and eventually penetrate into the personal computers, eventually to supplant Reduced instruction set computer, reduced instruction set computing (RISC) and complex instruction set computing (CISC) architectures for all general-purpose applications. When first released in 2001 after a decade of development, Itanium's performance was disappointing compared to better-established RISC and CISC processors. Em ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel 440BX
The Intel 440BX (codenamed Seattle) is a chipset from Intel, supporting Pentium II, Pentium III, and Celeron processors. It is also known as the i440BX and was released in April 1998. The official part number is 82443BX. Features The 440BX originally supported Slot 1 and later Socket 370 Intel P6-based processors in single and SMP configurations at speeds of up to 1 GHz (and potentially up to 1.4 GHz with certain unsupported modifications, up to 1.7 GHz can be achieved using Front Side Bus speeds higher than 133 MHz and appropriate cooling). Its southbridge counterpart is the PIIX4E. History The Intel 440BX is the third Pentium II chipset released by Intel, succeeding the 440FX and 440LX. With the new 100 MHz front side bus, Pentium II CPUs were able to scale better in performance by reducing the difference between processor clock and bus speed. The previous 66 MHz bus had become a serious bottleneck and dated back to the first Pentium "Classic ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Nonvolatile BIOS Memory
Nonvolatile BIOS memory refers to a small Memory (computers), memory on personal computer, PC motherboards that is used to store BIOS settings. It is traditionally called CMOS RAM because it uses a volatile memory, volatile, low-power CMOS, complementary metal–oxide–semiconductor (CMOS) Static random access memory, SRAM (such as the Motorola MC146818 or similar) powered by a small battery when system and standby power is off. It is referred to as non-volatile memory or Non-volatile random-access memory, NVRAM because, after the system loses power, it does retain state by virtue of the CMOS battery. When the battery fails, BIOS settings are reset to their defaults. The battery can also be used to power a real time clock (RTC) and the RTC, NVRAM and battery may be integrated into a single component. The name CMOS memory comes from the technology used to make the memory, which is easier to say than NVRAM. The CMOS RAM and the real-time clock have been integrated as a part of t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Real-time Clock
A real-time clock (RTC) is an electronic device (most often in the form of an integrated circuit) that measures the passage of time. Although the term often refers to the devices in personal computers, server (computing), servers and embedded systems, RTCs are present in almost any electronic device which needs to keep accurate time of day. Terminology The term ''real-time clock'' is used to avoid confusion with ordinary clock signal, hardware clocks which are only signals that govern digital electronics, and do not count time in human units. RTC should not be confused with real-time computing, which shares its three-letter acronym but does not directly relate to time of day. Purpose Although keeping time can be done without an RTC, using one has benefits: * Reliably maintains and provides current time through disruptive system states such as Hang (computing), hangs, Sleep mode, sleep, reboots, or if given sufficient backup power, full Shutdown (computing), shutdown and hardwa ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
