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Futurebus
Futurebus, or IEEE 896, is a computer bus standard, intended to replace all local bus connections in a computer, including the CPU, memory, plug-in cards and even, to some extent, LAN links between machines. The effort started in 1979 and didn't complete until 1987, and then immediately went into a redesign that lasted until 1994. By this point, implementation of a chip-set based on the standard lacked industry leadership. It has seen little real-world use, although custom implementations continue to be designed and used throughout industry. History In the late 1970s, VMEbus was faster than the parts plugged into it. It was quite reasonable to connect a CPU and RAM to VME on separate cards to build a computer. However, as the speed of the CPUs and RAM rapidly increased, VME was quickly overwhelmed. Increasing the speed of VME was not easy, because all of the parts plugged into it would have to be able to support these faster speeds as well. Futurebus looked to fix these problems ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
DEC 7000/10000 AXP
The DEC 7000 AXP and DEC 10000 AXP are a series of high-end multiprocessor server computers developed and manufactured by Digital Equipment Corporation, introduced on 10 November 1992 (although the DEC 10000 AXP was not available until the following year). These systems formed part of the first generation of systems based on the 64-bit Alpha AXP architecture and at the time of introduction, ran Digital's OpenVMS AXP operating system, with DEC OSF/1 AXP available in March 1993. They were designed in parallel with the VAX 7000 and VAX 10000 minicomputers, and are identical except for the processor module(s) and supported bus interfaces. A field upgrade from a VAX 7000/10000 to a DEC 7000/10000 AXP was possible by means of swapping the processor boards. The DEC 7000/10000 AXP were intended to supersede the VAX 6000 series, and themselves were succeeded in 1995 by the AlphaServer 8200 and 8400 (''TurboLaser'') enterprise servers. Models The DEC 7000 AXP was positioned as a da ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
QuickRing
QuickRing was a gigabit-rate interconnect that combined the functions of a computer bus and a network. It was designed at Apple Computer as a multimedia system to run "on top" of existing local bus systems inside a computer, but was later taken over by National Semiconductor and repositioned as an interconnect for parallel computing. It appears to have seen little use in either role, and is no longer being actively worked on. However it appears to have been an inspiration for other more recent technologies, such as HyperTransport. History QuickRing started as an offshoot of the fabled Futurebus project, which started in the late 1970s under the aegis of the IEEE. The Futurebus process quickly bogged down, and concluding it was doomed, several of the main designers left the effort in 1987 to try again on smaller projects, leading to both QuickRing and SCI. In the case of QuickRing the main proponent was Paul Sweazey of National Semiconductor, who had hosted Futurebus's cache ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
DEC 4000 AXP
The DEC 4000 AXP is a series of departmental server computers developed and manufactured by Digital Equipment Corporation introduced on 10 November 1992. These systems formed part of the first generation of systems based on the 64-bit Alpha AXP architecture and at the time of introduction, ran Digital's OpenVMS AXP or OSF/1 AXP operating systems. The DEC 4000 AXP was succeeded by the end of 1994 by the AlphaServer 2000 and 2100 departmental servers. Models There are two models of the DEC 4000 AXP: * Model 6x0, code named ''Cobra'': 160 MHz DECchip 21064 (EV4) processor(s) with 1 MB L2 cache each. * Model 7x0, code named ''Fang'': 190 MHz DECchip 21064 (EV4) processor(s) with 4 MB L2 cache each. It was introduced in October 1993. The possible values of 'x' is 1 or 2. These numbers specify the number of microprocessors in the system. Description The DEC 4000 AXP are two-way symmetric multiprocessing (SMP) capable systems that are housed in either a BA640 half-height cabine ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Scalable Coherent Interface
The Scalable Coherent Interface or Scalable Coherent Interconnect (SCI), is a high-speed interconnect standard for shared memory multiprocessing and message passing. The goal was to scale well, provide system-wide memory coherence and a simple interface; i.e. a standard to replace existing buses in multiprocessor systems with one with no inherent scalability and performance limitations. The IEEE Std 1596-1992, IEEE Standard for Scalable Coherent Interface (SCI) was approved by the IEEE standards board on March 19, 1992. It saw some use during the 1990s, but never became widely used and has been replaced by other systems from the early 2000s. History Soon after the Fastbus (IEEE 960) follow-on Futurebus (IEEE 896) project in 1987, some engineers predicted it would already be too slow for the high performance computing marketplace by the time it would be released in the early 1990s. In response, a "Superbus" study group was formed in November 1987. Another working group of the st ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Scalable Coherent Interconnect
The Scalable Coherent Interface or Scalable Coherent Interconnect (SCI), is a high-speed interconnect standard for shared memory multiprocessing and message passing. The goal was to scale well, provide system-wide memory coherence and a simple interface; i.e. a standard to replace existing buses in multiprocessor systems with one with no inherent scalability and performance limitations. The IEEE Std 1596-1992, IEEE Standard for Scalable Coherent Interface (SCI) was approved by the IEEE standards board on March 19, 1992. It saw some use during the 1990s, but never became widely used and has been replaced by other systems from the early 2000s. History Soon after the Fastbus (IEEE 960) follow-on Futurebus (IEEE 896) project in 1987, some engineers predicted it would already be too slow for the high performance computing marketplace by the time it would be released in the early 1990s. In response, a "Superbus" study group was formed in November 1987. Another working group of the st ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
DEC Alpha
Alpha (original name Alpha AXP) is a 64-bit reduced instruction set computer (RISC) instruction set architecture (ISA) developed by Digital Equipment Corporation (DEC). Alpha was designed to replace 32-bit VAX complex instruction set computers (CISC) and to be a highly competitive RISC processor for Unix workstations and similar markets. Alpha is implemented in a series of microprocessors originally developed and fabricated by DEC. These microprocessors are most prominently used in a variety of DEC workstations and servers, which eventually formed the basis for almost all of their mid-to-upper-scale lineup. Several third-party vendors also produced Alpha systems, including PC form factor motherboards. Operating systems that support Alpha included OpenVMS (formerly named OpenVMS AXP), Tru64 UNIX (formerly named DEC OSF/1 AXP and Digital UNIX), Windows NT (discontinued after NT 4.0; and prerelease Windows 2000 RC2), Linux ( Debian, SUSE, Gentoo and Red Hat), BSD UNIX ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Computer Bus
In computer architecture, a bus (shortened form of the Latin '' omnibus'', and historically also called data highway or databus) is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.) and software, including communication protocols. Early computer buses were parallel electrical wires with multiple hardware connections, but the term is now used for any physical arrangement that provides the same logical function as a parallel electrical busbar. Modern computer buses can use both parallel and bit serial connections, and can be wired in either a multidrop (electrical parallel) or daisy chain topology, or connected by switched hubs, as in the case of Universal Serial Bus (USB). Background and nomenclature Computer systems generally consist of three main parts: * The central processing unit (CPU) that processes data, * The memory that holds ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Computer Buses
In computer architecture, a bus (shortened form of the Latin '' omnibus'', and historically also called data highway or databus) is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.) and software, including communication protocols. Early computer buses were parallel electrical wires with multiple hardware connections, but the term is now used for any physical arrangement that provides the same logical function as a parallel electrical busbar. Modern computer buses can use both parallel and bit serial connections, and can be wired in either a multidrop (electrical parallel) or daisy chain topology, or connected by switched hubs, as in the case of Universal Serial Bus (USB). Background and nomenclature Computer systems generally consist of three main parts: * The central processing unit (CPU) that processes data, * The memory that holds ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
VMEbus
VMEbus (Versa Module Europa or Versa Module Eurocard bus) is a computer bus standard, originally developed for the Motorola 68000 line of CPUs, but later widely used for many applications and standardized by the IEC as ANSI/IEEE 1014-1987. It is physically based on Eurocard sizes, mechanicals and connectors (DIN 41612), but uses its own signalling system, which Eurocard does not define. It was first developed in 1981 and continues to see widespread use today. History In 1979, during development of the Motorola 68000 CPU, one of their engineers, Jack Kister, decided to set about creating a standardized bus system for 68000-based systems. The Motorola team brainstormed for days to select the name VERSAbus. VERSAbus cards were large, , and used edge connectors. Only a few products adopted it, including the IBM System 9000 instrument controller and the Automatix robot and machine vision systems. Kister was later joined by John Black, who refined the specifications and cre ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Bus Topology
A bus network is a network topology in which nodes are directly connected to a common half-duplex link called a bus. A host on a bus network is called a ''station''. In a bus network, every station will receive all network traffic, and the traffic generated by each station has equal transmission priority. A bus network forms a single network segment and collision domain. In order for nodes to share the bus, they use a medium access control technology such as carrier-sense multiple access (CSMA) or a bus master In computing, bus mastering is a feature supported by many bus architectures that enables a device connected to the bus to initiate direct memory access (DMA) transactions. It is also referred to as first-party DMA, in contrast with third-party .... References {{Network topologies Network architecture Network topology ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Central Processing Unit
A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, and input/output (I/O) operations specified by the instructions in the program. This contrasts with external components such as main memory and I/O circuitry, and specialized processors such as graphics processing units (GPUs). The form, design, and implementation of CPUs have changed over time, but their fundamental operation remains almost unchanged. Principal components of a CPU include the arithmetic–logic unit (ALU) that performs arithmetic and logic operations, processor registers that supply operands to the ALU and store the results of ALU operations, and a control unit that orchestrates the fetching (from memory), decoding and execution (of instructions) by directing the coordinated operations of the ALU, registers and o ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
InfiniBand
InfiniBand (IB) is a computer networking communications standard used in high-performance computing that features very high throughput and very low latency. It is used for data interconnect both among and within computers. InfiniBand is also used as either a direct or switched interconnect between servers and storage systems, as well as an interconnect between storage systems. It is designed to be scalable and uses a switched fabric network topology. By 2014, it was the most commonly used interconnect in the TOP500 list of supercomputers, until about 2016. Mellanox (acquired by Nvidia) manufactures InfiniBand host bus adapters and network switches, which are used by large computer system and database vendors in their product lines. As a computer cluster interconnect, IB competes with Ethernet, Fibre Channel, and Intel Omni-Path. The technology is promoted by the InfiniBand Trade Association. History InfiniBand originated in 1999 from the merger of two competing designs: ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
