Vivado Design Suite is a software suite produced by
Xilinx
Xilinx, Inc. ( ) was an American technology and semiconductor company that primarily supplied programmable logic devices. The company was known for inventing the first commercially viable field-programmable gate array (FPGA) and creating the fi ...
for synthesis and analysis of
hardware description language (HDL) designs, superseding
Xilinx ISE with additional features for
system on a chip
A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memor ...
development and
high-level synthesis
High-level synthesis (HLS), sometimes referred to as C synthesis, electronic system-level (ESL) synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that takes an abstract behavioral specification of a digital ...
.
Vivado represents a ground-up rewrite and re-thinking of the entire design flow (compared to ISE).
Like the later versions of
ISE, Vivado includes the in-built logic simulator. Vivado also introduces high-level synthesis, with a toolchain that converts C code into programmable logic.
Replacing the 15 year old ISE with Vivado Design Suite took 1000
man-year
A man-hour (sometimes referred to as person-hour) is the amount of work performed by the average worker in one hour. It is used for estimation of the total amount of uninterrupted labor required to perform a task. For example, researching and wri ...
s and cost US$200 million.
Features
Vivado was introduced in April 2012,
and is an integrated design environment (IDE) with system-to-IC level tools built on a shared scalable data model and a common debug environment. Vivado includes electronic system level (ESL) design tools for synthesizing and verifying C-based algorithmic IP; standards based packaging of both algorithmic and RTL IP for reuse; standards based IP stitching and systems integration of all types of system building blocks; and the verification of blocks and systems. A free version WebPACK Edition of Vivado provides designers with a limited version of the design environment.
Components
The Vivado High-Level Synthesis compiler enables
C,
C++ and
SystemC programs to be directly targeted into Xilinx devices without the need to manually create RTL.
Vivado HLS is widely reviewed to increase developer productivity, and is confirmed to support C++ classes, templates, functions and operator overloading.
Vivado 2014.1 introduced support for automatically converting
OpenCL
OpenCL (Open Computing Language) is a framework for writing programs that execute across heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), field-prog ...
kernels to IP for Xilinx devices.
OpenCL kernels are programs that execute across various CPU, GPU and FPGA platforms.
The Vivado Simulator is a component of the Vivado Design Suite. It is a compiled-language simulator that supports mixed-language,
Tcl scripts, encrypted IP and enhanced verification.
The Vivado IP Integrator allows engineers to quickly integrate and configure IP from the large Xilinx IP library. The Integrator is also tuned for
MathWorks
MathWorks is an American privately held corporation that specializes in mathematical computing software. Its major products include MATLAB and Simulink, which support data analysis and simulation.
History
The company's key product, MATLAB, was ...
Simulink
Simulink is a MATLAB-based graphical programming environment for modeling, simulating and analyzing multidomain dynamical systems. Its primary interface is a graphical block diagramming tool and a customizable set of block libraries. It offers t ...
designs built with Xilinx's System Generator and Vivado High-Level Synthesis.
The Vivado Tcl Store is a scripting system for developing add-ons to Vivado, and can be used to add and modify Vivado's capabilities.
Tcl is the scripting language on which Vivado itself is based.
All of Vivado's underlying functions can be invoked and controlled via Tcl scripts.
Device support
Vivado supports Xilinx's 7-series and all the newer devices (UltraScale and UltraScale+ series).
For development targeting older Xilinx's devices and CPLDs, the already discontinued
Xilinx ISE has to be used.
See also
*
Xilinx ISE
*
Intel Quartus Prime
*
ModelSim ModelSim is a multi-language environment by Siemens (previously developed by Mentor Graphics,) for simulation of hardware description languages such as VHDL, Verilog and SystemC, and includes a built-in C debugger.
References
External links
*
{{Programmable Logic
Computer-aided design software
Electronic design automation software
Digital electronics
AMD software