A test register, in the
Intel 80386
The Intel 386, originally released as the 80386 and later renamed i386, is the third-generation x86 architecture microprocessor from Intel. It was the first 32-bit computing, 32-bit processor in the line, making it a significant evolution in ...
and
Intel 80486
The Intel 486, officially named i486 and also known as 80486, is a microprocessor introduced in 1989. It is a higher-performance follow-up to the i386, Intel 386. It represents the fourth generation of binary compatible CPUs following the Inte ...
processor, was a register used by the processor, usually to do a self-test. Most of these registers were undocumented, and used by specialized software. The test registers were named TR3 to TR7. Regular programs don't usually require these registers to work. With the
Pentium
Pentium is a series of x86 architecture-compatible microprocessors produced by Intel from 1993 to 2023. The Pentium (original), original Pentium was Intel's fifth generation processor, succeeding the i486; Pentium was Intel's flagship proce ...
, the test registers were replaced by a variety of
model-specific register
A model-specific register (MSR) is any of various control registers in the x86 system architecture used for debugging, program execution tracing, performance monitoring, and toggling certain CPU features.
History
With the introduction of the 80 ...
s (MSRs).
In the 80386, two test registers, TR6 and TR7, were provided for the purpose of
TLB testing. TR6 was the test command register, and TR7 was the test data register. The 80486 provided three additional registers, TR3, TR4 and TR5, for testing of the L1 cache. TR3 was a data register, TR4 was an address register and TR5 was a command register. These registers were accessed by variants of the
MOV instruction. A test register may either be the source operand or the destination operand. The MOV instructions are defined in both
real-address mode
Real mode, also called real address mode, is an operating mode of all x86-compatible CPUs. The mode gets its name from the fact that addresses in real mode always correspond to real locations in memory. Real mode is characterized by a 20-bit se ...
and
protected mode
In computing, protected mode, also called protected virtual address mode, is an operational mode of x86-compatible central processing units (CPUs). It allows system software to use features such as Memory_segmentation, segmentation, virtual mem ...
. The test registers are privileged resources. In protected mode, the MOV instructions that access them can only be executed at
privilege level
In computer science, hierarchical protection domains, often called protection rings, are mechanisms to protect data and functionality from faults (by improving fault tolerance) and malicious behavior (by providing computer security).
Computer ...
0. An attempt to read or write the test registers when executing at any other privilege level causes a general protection exception. Also, those instructions generate invalid opcode exception on most CPUs newer than 80486.
The instruction is encoded in two ways, depending on the flow of data. Moving data from a general purpose register into a test register is encoded as
0F 26 /r (with
r/m being the GPR, and
reg being the test register). Moving data the other way (i.e. from the test register into a general purpose register) is encoded as
0F 24 /r (with
r/m being the GPR, and
reg being the test register).
Only register-register moves are supported - as such, the "mod" field (top 2 bits) of the instruction's
ModR/M
The ModR/M byte is an important part of instruction encoding for the x86 instruction set.
Description
Opcodes in x86 are generally one-byte, though two-byte instructions and prefixes exist. ModR/M is a byte that, if required, follows the opcode a ...
byte should be set to
11b. (Setting the "mod" field of the ModR/M byte to anything else than
11b results in undefined behaviour, with different behaviour observed on different processors.
[Robert L. Hummel]
PC Magazine Programmer's Technical Reference
1992, , page 476.)
The test registers and/or associated opcodes were supported in the following
x86
x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel, based on the 8086 microprocessor and its 8-bit-external-bus variant, the 8088. Th ...
processors:
See also
*
Control register
A control register is a processor register that changes or controls the general behavior of a CPU or other digital device. Common tasks performed by control registers include interrupt control, switching the addressing mode, paging control, and ...
*
x86 debug register
On the x86 architecture, a debug register is a register used by a processor for program debugging. There are six debug registers, named DR0...DR7, with DR4 and DR5 as obsolete synonyms for DR6 and DR7. The debug registers allow programmers to sele ...
References
Digital registers
X86 architecture
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