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The Xputer is a design for a reconfigurable computer, proposed by computer scientist Reiner Hartenstein. Hartenstein uses various terms to describe the various innovations in the design, including config-ware, flow-ware, morph-ware, and "anti-machine". The Xputer represents a move away from the traditional Von Neumann computer architecture, to a coarse-grained "soft
Arithmetic logic unit In computing, an arithmetic logic unit (ALU) is a Combinational logic, combinational digital circuit that performs arithmetic and bitwise operations on integer binary numbers. This is in contrast to a floating-point unit (FPU), which operates on ...
(ALU)" architecture.Field-Programmable Logic: Architectures, Synthesis and Applications
Reiner W. Hartenstein, Springer Science & Business Media, 24-Aug-1994
Parallelism is achieved by configurable elements known as ''reconfigurable datapath arrays'' (rDPA), organized in a two-dimensional array of ALU's similar to the KressArray.Compilation Techniques for Reconfigurable Architectures
Springer Science & Business Media, 02-Apr-2011
Designing Embedded Processors: A Low Power Perspective
Springer Science & Business Media, 27-Jul-2007


Architecture

The Xputer architecture is data-stream-based and is the counterpart of the instruction-based von Neumann computer architecture. The Xputer architecture was one of the first coarse-grained reconfigurable architectures, and consists of a reconfigurable datapath array (rDPA) organized as a two-dimensional array of ALUs (rDPU). The bus-width between ALU's were 32-bit in the first version of the Xputer. The ALUs (also known as rDPUs) are used for computing a single mathematical operation, such as addition, subtraction or multiplication, and can also be used purely for routing. ALUs are mesh-connected via three types of connections, and dataflow along these connections are managed by an address generation unit. *Nearest neighbour (connections between neighbouring ALUs) *Row/column back-buses *Global bus (a single global bus for interconnection between further ALUs) Programs for the Xputer are written in the C language, and compiled for usage on the Xputer using the CoDeX compiler written by the author. The CoDeX compiler maps suitable portions of the C program onto the Xputer's rDPA fabric. The remainder of the program is executed on the host system, such as a
personal computer A personal computer, commonly referred to as PC or computer, is a computer designed for individual use. It is typically used for tasks such as Word processor, word processing, web browser, internet browsing, email, multimedia playback, and PC ...
.


rDPA

A reconfigurable datapath array (rDPA) is a
semiconductor A semiconductor is a material with electrical conductivity between that of a conductor and an insulator. Its conductivity can be modified by adding impurities (" doping") to its crystal structure. When two regions with different doping level ...
device containing reconfigurable data path units and programmable interconnects, first proposed by Rainer Kress in 1993, at the
University of Kaiserslautern The University of Kaiserslautern-Landau (German: ''Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau'', also known as RPTU) is a public research university in Kaiserslautern and Landau in der Pfalz, Germany. The university wa ...
. Instead of
FPGA A field-programmable gate array (FPGA) is a type of configurable integrated circuit that can be repeatedly programmed after manufacturing. FPGAs are a subset of logic devices referred to as programmable logic devices (PLDs). They consist of a ...
s ( field-programmable gate arrays) having single bit configurable logic blocks (CLBs), rDPAs have multiple bits wide (for instance, 32-bit path width) reconfigurable datapath units (rDPUs). Each rDPU can be configured to perform an individual function. These rDPUs and interconnects can be programmed after the manufacturing process by the customer/designer (hence the term "reconfigurable") so that the rDPA can perform whatever complex computation is needed. Because rDPUs are multiple bits wide (for instance, 32 bits), we talk about coarse-grained reconfigurability - in contrast to
FPGA A field-programmable gate array (FPGA) is a type of configurable integrated circuit that can be repeatedly programmed after manufacturing. FPGAs are a subset of logic devices referred to as programmable logic devices (PLDs). They consist of a ...
s with single-bit wide configurable logic blocks, called fine-gained reconfigurable. rDPAs are structurally programmed from "config-ware"
source code In computing, source code, or simply code or source, is a plain text computer program written in a programming language. A programmer writes the human readable source code to control the behavior of a computer. Since a computer, at base, only ...
, compiled into pipe-networks to be mapped onto the rDPA. rDPAs are not instruction-stream-driven and have no instruction fetch at run time. rDPUs do not have a program counter.Reconfigurable System Design and Verification
CRC Press, 17-Feb-2009


References

{{Programmable Logic Computer architecture Reconfigurable computing