Background
On July 7, 2019, AMD released the first iteration of the RDNA microarchitecture, a new graphics architecture designed specifically for gaming that replaced the aging Graphics Core Next (GCN) microarchitecture. With RDNA, AMD sought to reduce latency and improve power efficiency over their previousArchitectural details
Compute Unit
RDNA 2 contains a significant increase in the number of Compute Units (CUs) with a maximum of 80, a doubling from the maximum of 40 in the Radeon RX 5700 XT. Each Compute Unit contains 64 shader cores. CUs are organized into groups of two named Work Group Processors with 32KB of shared L0 cache per WGP. Each CU contains two sets of an SIMD32 vector unit, an SISD scalar unit, textures units, and a stack of various caches. New low precision data types like INT4 and INT8 are new supported data types for RDNA 2 CUs. The RDNA 2 graphics pipeline has been reconfigured and reordered for greater performance-per-watt and more efficient rendering by moving the caches closer to the shader engines. A new mesh shaders model allows shader rendering to be done in parallel using smaller batches of primitives called "meshlets". As a result, the mesh shaders feature enables greater control of the GPU geometry pipeline.Ray tracing
Real-time hardware accelerated ray tracing is a new feature for RDNA 2 which is handled by a dedicated ray accelerator inside each CU. Ray tracing on RDNA 2 relies on the more open DirectX Raytracing protocol rather than the Nvidia RTX protocol. In February 2023, it was reported that driver updates had boosted ray tracing performance by up to 40% using DirectX Raytracing.Clock speeds
With RDNA 2 using the same 7 nm node as RDNA, AMD claims that RDNA 2 achieves a 30% frequency increase over its predecessor while using the same power.Cache and memory subsystem
In addition to the traditional L1 and L2 caches that GPUs possess, RDNA 2 adds a new global L3 cache that AMD calls "Infinity Cache". This was done to avoid the use of a wider memory bus while still being able to maintain the same data bandwidth. Product technology architect Sam Naffziger said that, without Infinity Cache, "We were looking at the daunting prospect of having to put a 512-bit interface and all the power, area and expense associated with that". Using a wider memory bus requires more power which is in conflict with AMD's increased performance-per-watt goals for RDNA 2. AMD engineers ran tests comparing RDNA 2 silicon featuring a large on-die cache and with wider memory buses. They discovered that having such a cache would aid in the re-use of temporal and spatial data when the GPU is rendering a complex image. It is beneficial for the GPU's compute units to have fast access to a physically close cache rather than searching for data in video memory. AMD claims that RDNA 2's 128MB of on-die Infinity Cache "dramatically reduces latency and power consumption". The GPU having access to a large L2 or L3 cache allows it to more quickly access necessary data compared to accessing VRAM or system RAM. The Infinity Cache is made up of two sets of 64MB cache that can run on its own clock rate independent from the GPU cores. The Infinity Cache has a peak internal transfer bandwidth of 1986.6 GB/s and results in less reliance being placed on the GPU'sPower efficiency
AMD claims that RDNA 2 achieves up to a 54% increase in performance-per-watt over the first RDNA microarchitecture. 21% of that 54% improvement is attributed to performance-per-clock enhancements, in part due to the addition of Infinity Cache.Media engine
RDNA 2 uses the VCN 3.0, VCN 3.1, and VCN 3.1.2 video decoding blocks in its media engine. It adds support for AV1 decoding at up to 8K resolution, though AV1 hardware encoding support would not come untilNavi 2x dies
Products
Desktop
Mobile
Workstation
Desktop Workstation
Mobile Workstation
Integrated graphics processing units (iGPUs)
Consoles
See also
*References
{{AMD graphics AMD microarchitectures Computer-related introductions in 2020 Graphics microarchitectures