Package on a package (PoP) is an

integrated circuit packaging Integrated circuit packaging is the final stage of fabrication (semiconductor), semiconductor device fabrication, in which the die (integrated circuit), die is encapsulated in a supporting case that prevents physical damage and corrosion. The ...

method to vertically combine

ball grid array A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be pu ...

(BGA) packages for discrete logic and

memory Memory is the faculty of the mind by which data or information is encoded, stored, and retrieved when needed. It is the retention of information over time for the purpose of influencing future action. If past events could not be remembe ...

. Two or more packages are installed atop each other, i.e. stacked, with a standard interface to route signals between them. PoP allows higher component density in devices, such as

mobile phone A mobile phone or cell phone is a portable telephone that allows users to make and receive calls over a radio frequency link while moving within a designated telephone service area, unlike fixed-location phones ( landline phones). This rad ...

personal digital assistant A personal digital assistant (PDA) is a multi-purpose mobile device which functions as a personal information manager. Following a boom in the 1990s and 2000s, PDAs were mostly displaced by the widespread adoption of more highly capable smar ...

s (PDA), and

digital camera A digital camera, also called a digicam, is a camera that captures photographs in Digital data storage, digital memory. Most cameras produced today are digital, largely replacing those that capture images on photographic film or film stock. Dig ...

s, at the cost of being slightly taller. Stacks with more than 2 packages are uncommon, due to heat dissipation considerations.

Configuration

Two widely used configurations exist for PoP: * Pure memory stacking: two or more memory only packages are stacked on each other * Mixed logic-memory stacking: logic (CPU) package on the bottom, memory package on top. For example, the bottom could be a

system on a chip A system on a chip (SoC) is an integrated circuit that combines most or all key components of a computer or Electronics, electronic system onto a single microchip. Typically, an SoC includes a central processing unit (CPU) with computer memory, ...

(SoC) for a

. The logic package is on the bottom because it needs many more BGA connections to the motherboard. During

PCB assembly A printed circuit board (PCB), also called printed wiring board (PWB), is a laminated sandwich structure of conductive and insulating layers, each with a pattern of traces, planes and other features (similar to wires on a flat surface) ...

, the bottom package of a PoP stack is placed directly on the PCB, and the other package(s) of the stack are stacked on top. The packages of a PoP stack become attached to each other (and to the PCB) during

reflow soldering Reflow soldering is a process in which a solder paste (a sticky mixture of powdered solder and flux (metallurgy), flux) is used to temporarily attach anywhere from one to thousands of tiny electrical components to their contact pads, after wh ...

. PoP packaging can be done by the chip manufacturer (such as

Samsung Samsung Group (; stylised as SΛMSUNG) is a South Korean Multinational corporation, multinational manufacturing Conglomerate (company), conglomerate headquartered in the Samsung Town office complex in Seoul. The group consists of numerous a ...

TSMC Taiwan Semiconductor Manufacturing Company Limited (TSMC or Taiwan Semiconductor) is a Taiwanese multinational semiconductor contract manufacturing and design company. It is one of the world's most valuable semiconductor companies, the world' ...

), or can be done by the OEM (such as

Meizu ‌Meizu (sometimes stylized in all caps) (Chinese name: 星纪魅族集团) ‌ is a technology company registered in Zhuhai, China. Its predecessor, Meizu Technology, was founded by Huang Zhang in 2003 and was famous for its MP3 player and s ...

Benefits

The package on a package technique tries to combine the benefits of traditional packaging with the benefits of die-stacking techniques, while avoiding their drawbacks. Traditional packaging places each die in its own package, a package designed for normal PCB assembly techniques that place each package directly on the PCB side-by-side. The 3D die-stacking

system in package A system in a package (SiP) or system-in-package is a number of integrated circuits (ICs) enclosed in one chip carrier package or encompassing an IC package substrate that may include passive components and perform the functions of an entire sys ...

(SiP) techniques stacks multiple die in a single package, which has several advantages and also some disadvantages compared to traditional PCB assembly. In embedded PoP techniques, chips are embedded in a substrate on the bottom of the package. This PoP technology enables smaller packages with shorter electrical connections and is supported by companies such as Advanced Semiconductor Engineering (ASE).

Advantages over traditional isolated-chip packaging

The most obvious benefit is motherboard space savings. PoP uses much less PCB area, almost as little as stacked-die packages. Electrically, PoP offers benefits by minimizing track length between different interoperating parts, such as a controller and memory. This yields better electrical performance of devices, since shorter routing of interconnections between circuits yields faster signal propagation and reduced noise and cross-talk.

Advantages over chip stacking

There are several key differences between stacked-die and stacked-package products. The main financial benefit of package on a package is that the memory device is decoupled from the logic device. Therefore this gives PoP all the same advantages that traditional packaging has over stacked-die products: * The memory package can be tested separately from the logic package * Only "known good" packages are used in final assembly (if the memory is bad only the memory is discarded and so on). Compare this to stacked-die packages where the entire set is useless and rejected if either the memory or logic is bad. * The end user (such as makers of

s or

s) controls the logistics. This means memory from different suppliers can be used at different times without changing the logic. The memory becomes a commodity to be sourced from the lowest cost supplier. This trait is also a benefit compared to PiP (package in package) which requires a specific memory device to be designed in and sourced upstream of the end user. * Any mechanically mating top package can be used. For a low-end phone, a smaller memory configuration may be used on the top package. For a high-end phone, more memory could be used with the same bottom package. This simplifies inventory control by the OEM. For a stacked-die package or even PiP (package in package), the exact memory configuration must be known weeks or months in advance. * Because the memory only comes into the mix at final assembly, there is no reason for logic suppliers to source any memory. With a stacked-die device, the logic provider must buy wafers of memory from a memory supplier.

JEDEC standardization

JEDEC The Joint Electron Device Engineering Council (JEDEC) Solid State Technology Association is a consortium of the semiconductor industry headquartered in Arlington County, Virginia, Arlington, United States. It has over 300 members and is focused ...

JC-11 committee deals with package outline drawing standards related to the bottom PoP package. See documents MO-266A and JEDEC publication 95, Design Guide 4.22. * JEDEC JC-63 committee deals with top (memory) PoP package pinout standardization. See JEDEC Standard No. 21-C, Page 3.12.2 – 1

Other names

Package on a package is also known by other names: * PoP: refers to the combined top and bottom packages * PoPt: refers to the top package * PoPb: refers to the bottom package * PSvfBGA: refers to the bottom package: ''P''ackage ''S''tackable ''V''ery thin ''F''ine pitch ''B''all ''G''rid ''A''rray * PSfcCSP: refers to the bottom package: ''P''ackage ''S''tackable ''F''lip ''C''hip ''C''hip ''S''cale ''P''ackage

History

In 2001, a

Toshiba is a Japanese multinational electronics company headquartered in Minato, Tokyo. Its diversified products and services include power, industrial and social infrastructure systems, elevators and escalators, electronic components, semiconductors ...

research team including T. Imoto, M. Matsui and C. Takubo developed a "System Block Module" wafer bonding process for manufacturing

3D integrated circuit A three-dimensional integrated circuit (3D IC) is a MOS (metal-oxide semiconductor) integrated circuit (IC) manufactured by stacking as many as 16 or more ICs and interconnecting them vertically using, for instance, through-silicon vias (TSVs) or ...

(3D IC) packages. The earliest known commercial use of a 3D package-on-package chip was in

Sony is a Japanese multinational conglomerate (company), conglomerate headquartered at Sony City in Minato, Tokyo, Japan. The Sony Group encompasses various businesses, including Sony Corporation (electronics), Sony Semiconductor Solutions (i ...

PlayStation Portable The PlayStation Portable (PSP) is a handheld game console developed and marketed by Sony Interactive Entertainment, Sony Computer Entertainment. It was first released in Japan on December 12, 2004, in North America on March 24, 2005, and in PA ...

(PSP)

handheld game console A handheld game console, or simply handheld console, is a small, portable self-contained video game console with a built-in screen, game controls and speakers. Handheld game consoles are smaller than home video game consoles and contain the con ...

, released in 2004. The

PSP hardware The PlayStation Portable's hardware consists of the physical components of the PlayStation Portable (PSP) and its accessories. Overview The PSP was designed by for the Sony Computer Entertainment subsidiary of Sony Corporation. Early models pre ...

includes

eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivale ...

(embedded

DRAM Dram, DRAM, or drams may refer to: Technology and engineering * Dram (unit), a unit of mass and volume, and an informal name for a small amount of liquor, especially whisky or whiskey * Dynamic random-access memory, a type of electronic semicondu ...

) memory manufactured by

in a 3D package chip with two dies stacked vertically. Toshiba called it "semi-embedded DRAM" at the time, before later calling it a stacked "chip-on-chip" (CoC) solution. In April 2007, Toshiba commercialized an eight-layer 3D chip package, the 16 GB THGAM embedded

NAND flash Flash memory is an Integrated circuit, electronic Non-volatile memory, non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory, NOR flash and NAND flash, are named for t ...

memory chip, which was manufactured with eight stacked 2GB NAND flash chips. The same month, ("Package-on-package secure module having anti-tamper mesh in the substrate of the upper package") was filed by Steven M. Pope and Ruben C. Zeta of

Maxim Integrated Maxim Integrated Products, Inc., was an American semiconductor company that designed, manufactured, and sold analog and mixed-signal integrated circuits for the automotive, industrial, communications, consumer, and computing markets. Maxim's pr ...

. In September 2007,

Hynix Semiconductor SK Hynix Inc. () is a South Korean supplier of dynamic random-access memory (DRAM) chips and flash memory chips. SK Hynix is one of the world's largest semiconductor vendors. Founded as Hyundai Electronics in 1983, SK Hynix was integrated into ...

introduced 24-layer 3D packaging technology, with a 16GB flash memory chip that was manufactured with 24 stacked NAND flash chips using a wafer bonding process.