Moscow Center Of SPARC Technologies
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MCST (, acronym for Moscow Center of SPARC Technologies) is a Russian
microprocessor A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...
company A company, abbreviated as co., is a Legal personality, legal entity representing an association of legal people, whether Natural person, natural, Juridical person, juridical or a mixture of both, with a specific objective. Company members ...
that was set up in 1992. Different types of processors made by MCST were used in personal computers, servers and computing systems. MCST develops microprocessors based on two different
instruction set architecture In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, ...
(ISA): ''
Elbrus Mount Elbrus; ; is the highest mountain in Russia and Europe. It is a dormant volcano, dormant stratovolcano rising above sea level, and is the highest volcano in Eurasia, as well as the List of mountain peaks by prominence, tenth-most promi ...
'' and '' SPARC''. MCST is a direct descendant of the
Lebedev Institute of Precision Mechanics and Computer Engineering Lebedev Institute of Precision Mechanics and Computer Engineering (IPMCE) is a Russian research institution. It used to be a Soviet Academy of Sciences organization in Soviet times. The institute specializes itself in the development of: * Compute ...
. MCST is the base organization of the Department of Informatics and Computer Engineering of the
Moscow Institute of Physics and Technology Moscow Institute of Physics and Technology (MIPT; , also known as PhysTech), is a public university, public research university located in Moscow Oblast, Russia. It prepares specialists in theoretical physics, theoretical and applied physics, ...
. MCST develops the Elbrus processor architecture and the eponymous family of universal
VLIW Very long instruction word (VLIW) refers to instruction set architectures that are designed to exploit instruction-level parallelism (ILP). A VLIW processor allows programs to explicitly specify instructions to execute in parallel computing, para ...
microprocessors based on it with the participation of . The name "Elbrus" has been given the
backronym A backronym is an acronym formed from an already existing word by expanding its letters into the words of a phrase. Backronyms may be invented with either serious or humorous intent, or they may be a type of false etymology or folk etymology. The ...
"ExpLicit Basic Resources Utilization Scheduling". In June 2024, the "Elbrus-2S3" has resurfaced on the Russian market. This is a nona-core("CPU-core×2" + "3D・GPU-core×1" + "2D・GPU-core×2" + "VPU-core×4") CPU manufactured with a 16nm process. This is the cut down version of the 16-core Elbrus-16S, which might also resurface at some point if there's enough market demand for this to make sense. In December 2024, Programmable logic controllers "PLC-Elbrus (based on the Elbrus-2S3 microprocessor) " of the holding company "Rostec Electronics" of the State Corporation Rostec have passed state registration and are included in the register of software and hardware complexes of the Ministry of Digital Development of the Russian Federation. This allows using the devices at critical information infrastructure facilities to create automated process control systems.


Products

* '' Elbrus 1'' (1973) was the fourth generation Soviet computer, developed by Vsevolod Burtsev. Implements tag-based architecture and
ALGOL ALGOL (; short for "Algorithmic Language") is a family of imperative computer programming languages originally developed in 1958. ALGOL heavily influenced many other languages and was the standard method for algorithm description used by the ...
as system language like the
Burroughs large systems The Burroughs Large Systems Group produced a family of large 48-bit computing, 48-bit mainframe computer, mainframes using stack machine instruction sets with dense Syllable (computing), syllables.E.g., 12-bit syllables for B5000, 8-bit syllables f ...
. A side development was an update of the 1965 BESM-6 as Elbrus-1K2. * '' Elbrus 2'' (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar
RISC In electronics and computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a comp ...
processors. Re-implementation of the Elbrus 1 architecture with faster
ECL ECL may refer to: Science and technology * Electrochemiluminescence * Enhanced chemiluminescence * Emitter-coupled logic * Enterochromaffin-like cell Computing * ECL programming language, an extensible programming language * ECL (data-centric ...
chips. * '' Elbrus 3'' (1986) was a 16-processor computer developed by
Boris Babayan Boris Artashesovich Babayan (; ; born Baku, 20 December 1933) is a Soviet and Russian computer scientist of Armenian descent, notable as the pioneering creator of supercomputers in the former Soviet Union and Russia. Biography Babayan was born ...
. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a
VLIW Very long instruction word (VLIW) refers to instruction set architectures that are designed to exploit instruction-level parallelism (ILP). A VLIW processor allows programs to explicitly specify instructions to execute in parallel computing, para ...
architecture. * '' Elbrus-90micro'' (1998–2010) is a computer line based on SPARC
instruction set architecture In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, ...
(ISA) microprocessors: MCST R80, R150, R500, R500S, MCST-4R (MCST-R1000) and MCST-R2000 working at 80, 150, 500, 1000 and 2000 MHz. * '' Elbrus-3M1'' (2005) is a two-processor computer based on the
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
microprocessor employing
VLIW Very long instruction word (VLIW) refers to instruction set architectures that are designed to exploit instruction-level parallelism (ILP). A VLIW processor allows programs to explicitly specify instructions to execute in parallel computing, para ...
architecture working at 300 MHz. It is a further development of the ''Elbrus 3'' (1986). * '' Elbrus МВ3S1/C'' (2009) is a
ccNUMA Non-uniform memory access (NUMA) is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to the processor. Under NUMA, a processor can access its own local memory faster than non- ...
4-processor computer based on Elbrus-S microprocessor working at 500 MHz. * ''
Elbrus-2S+ Elbrus-2S+ () is a Multi-core processor, multi-core microprocessor based on the Elbrus 2000 architecture developed by Moscow Center of SPARC Technologies (MCST). There are multiple reports regarding the evolution of this technology for the pur ...
'' (2011) is a dual-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 500 MHz, with capacity to calculate 16 GFlops. * '' Elbrus-2SM'' (2014) is a dual-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 300 MHz, with capacity to calculate 9.6 GFlops. * '' Elbrus-4S'' (2014) is a quad-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 800 MHz, with capacity to calculate 50 GFlops. * '' Elbrus-8S'' (2014–2015) is an octa-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 1300 MHz, with capacity to calculate 250 GFlops. * '' Elbrus-8SV'' (2018) is an octa-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 1500 MHz, with capacity to calculate 576 GFlops. * '' Elbrus-16S'' (2021) is 16-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 2000 MHz, with capacity to calculate 750 GFlops at double precision and 1.5 TFlops at single precision operations. * ''Elbrus-32S'' (Sample production is planned in 2025) is a 32-core
Elbrus 2000 The Elbrus 2000 (or e2k; ) is a Russian 512-bit wide VLIW microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC. It supports two instruction set architectures (ISA): Elbrus VLIW and Intel x86 (a compl ...
based microprocessor working at 2500 MHz, with capacity to calculate 1.5 TFlops.The most powerful Russian processor will be 32-core and made according to the technorm 7 nm
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See also

*
History of computing in the Soviet Union The history of computing in the Soviet Union began in the late 1940s, when the country began to develop its MESM, Small Electronic Calculating Machine (MESM) at the Kiev Institute of Electrotechnology in Feofaniya. Initial ideological opposition ...
*
Information technology in Russia The Information technology sector in Russia employed around 300,000 people in 2012, and contributed 1.2% of the country's GDP in 2015. The sector is concentrated in the cities of Moscow and Saint Petersburg. History The Russian IT sector drew co ...


References


External links


Elbrus website in Russian
Computer companies established in 1992 Russian companies established in 1992 Computer companies of Russia Computer hardware companies Computer systems companies Russian brands Manufacturing companies based in Moscow Information technology in Russia {{Russia-company-stub