"Cascade Lake-SP" (14 nm) Scalable Performance

* Support for up to 12

DIMM A DIMM (Dual In-line Memory Module) is a popular type of memory module used in computers. It is a printed circuit board with one or both sides (front and back) holding DRAM chips and pins. The vast majority of DIMMs are manufactured in compl ...

s of

DDR4 Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth ("double data rate") interface. Released to the market in 2014, it is a variant of dynamic rando ...

memory per CPU socket * Xeon Platinum supports up to eight sockets; Xeon Gold supports up to four sockets; Xeon Silver and Bronze support up to two sockets * No suffix letter: up to 1.0TB DDR4 per socket * -L: Large DDR memory tier support (up to 4.5TB) * -M: Medium DDR memory tier support (up to 2.0TB) * -N: Network & NFV specialized * -R: Refresh (higher performance) * -S: Search value specialized * -T: High thermal-case and extended reliability * -U: Uniprocessor * -V: VM density value specialized * -Y: Speed select

Xeon Gold (uniprocessor)

Xeon Bronze and Silver (dual processor)

Xeon Gold (dual processor)

Xeon Gold (quad processor)

Xeon Platinum (octa processor)

" Cascade Lake-AP" (14 nm) Advanced Performance

* Support up to two sockets * 2 dies per socket

Xeon Platinum (dual processor)

"Cascade Lake-W" (14 nm)

* All models support: '' MMX, SSE,

SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...

SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...

SSSE3 Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitect ...

SSE4.1 SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core (microarchitecture), Core microarchitecture and AMD K10, AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with va ...

, SSE4.2, AVX,

AVX2 Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...

AVX-512 AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...

FMA3 The FMA instruction set is an extension to the 128- and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations. There are two variants: * FMA4 is supported in AM ...

, MPX, Enhanced Intel

SpeedStep Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel's microprocessors that allow the clock speed of the processor to be ...

Technology (EIST),

Intel 64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit extension of the x86 instruction set. It was announced in 1999 and first available in the AMD Opteron family in 2003. It introduces two new operating modes: 64-bit mode an ...

, XD bit (an

NX bit The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...

implementation),

Intel VT-x x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...

Intel VT-d x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...

Turbo Boost Intel Turbo Boost is Intel's trade name for central processing units' (CPUs') dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher result ...

, Hyper-threading,

AES-NI An Advanced Encryption Standard instruction set (AES instruction set) is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern proces ...

, Intel TSX-NI, Smart Cache, DL Boost.'' * PCI Express lanes: 48 * Supports up to 8 DIMMs of DDR4 memory, maximum 1 TB.

Xeon W-22xx (uniprocessor)

Xeon W-32xx (uniprocessor)

* PCI Express lanes: 64 * Supports up to 12 DIMMs of DDR4 memory, maximum 1 TB. * -M: Medium DDR memory tier support (up to 2 TB)

References

{{reflist Intel Xeon (Cascade Lake)