AMD FX is a discontinued series of
AMD microprocessors for
personal computer
A personal computer, commonly referred to as PC or computer, is a computer designed for individual use. It is typically used for tasks such as Word processor, word processing, web browser, internet browsing, email, multimedia playback, and PC ...
s. The following is a list of
AMD FX brand microprocessors. Some
APUs also carry an FX model name, but the term "FX" normally only refers to
CPUs
A central processing unit (CPU), also called a central processor, main processor, or just processor, is the primary Processor (computing), processor in a given computer. Its electronic circuitry executes Instruction (computing), instructions ...
which are not just APUs with the
iGPU
A graphics card (also called a video card, display card, graphics accelerator, graphics adapter, VGA card/VGA, video adapter, display adapter, or colloquially GPU) is a computer expansion card that generates a feed of graphics output to a displa ...
disabled.
Features overview
CPUs
VS RF
APU features table
Desktop CPUs
Athlon 64 Family (90–130 nm)
These processors were the first AMD CPUs to use the "FX" designation and identified the chip as being higher-performance. The frequency multiplier was unlocked in these chips.
SledgeHammer Core (130 nm)
*
Socket 940
* L1 cache: 64 kb + 64 kb (data + instruction)
* L2 cache: 1024 kb (full speed)
* Instruction sets:
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
Enhanced 3DNow!,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64
FX-51 (2.2 GHz) and FX-53 (2.4 GHz)
ClawHammer Core (130 nm)
*
Socket 939
* L1 cache: 64 kb + 64 kb (data + instruction)
* L2 cache: 1024 kb (full speed)
* Instruction sets:
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
Enhanced 3DNow!,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64
FX-53 (2.4 GHz) and FX-55 (2.6 GHz)
SanDiego Core (90 nm)
*
Socket 939
* L1 cache: 64 kb + 64 kb (data + instruction)
* L2 cache: 1024 kb (full speed)
* Instruction sets:
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
Enhanced 3DNow!,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64,
Cool'n'Quiet
AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
FX-55 (2.6 GHz) and FX-57 (2.8 GHz)
Toledo Core (90 nm, dual-core)
*
Socket 939
* L1 cache (per core): 64 kb + 64 kb (data + instruction)
* L2 cache (per core): 1024 kb (full speed)
* Instruction sets:
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
Enhanced 3DNow!,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64,
Cool'n'Quiet
AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
FX-60 (2.6 GHz)
Windsor Core (90 nm, dual-core)
*
Socket AM2
The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. It was released on May 23, 2006, a ...
* L1 cache (per core): 64 kb + 64 kb (data + instruction)
* L2 cache (per core): 1024 kb (full speed)
* Instruction sets:
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
Enhanced 3DNow!,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64,
Cool'n'Quiet
AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware- ...
FX-62 (2.8 GHz)
Windsor Core (90 nm, dual-core, dual-processor)
*
Socket F
* L1 cache (per core): 64 kb + 64 kb (data + instruction)
* L2 cache (per core): 1024 kb (full speed)
* Instruction sets:
MMX,
SSE,
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets introduced by Intel with the initial version of the Pentium 4 in 2000. SSE2 instructions allow the use of ...
,
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
Enhanced 3DNow!,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64,
Cool'n'Quiet
AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware- ...
FX-70 (2.6 GHz), FX-72 (2.8 GHz), FX-74 (3.0 GHz)
Bulldozer Family (32 nm)
* All models
binned from 8 logical cores with simple OROCHI die production, in 938 pins μPGA package
AM3+ socket.
* All AMD FX microprocessors are unlocked and overclockable.
* Two Integers-Clusters (seen as logical cores from OS) in each Bulldozer
Module.
* 4 Bulldozer modules within FX-8 series, 3 in FX-6 series, and 2 in FX-4 series.
* All models support up to 4
DIMMs of
DDR3-1866 memory.
Bulldozer Core (Zambezi, 32 nm)
* Codenamed: ''Zambezi''
* Transistors: ~1.6 billion (real node count)
*
Die size: 319 mm
2 (real measured up size)
* L1 data cache (per core): 16 kb
* L1 instruction cache (per module): 64 kb
* L2 cache (per module): 2048 kb
* All models support:
MMX(+),
SSE1 -
2 -
3 -
3s -
4.1 -
4.2 -
4a,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware- ...
,
IOMMU,
,
CLMUL,
AVX,
XOP,
FMA4,
F16C,
ABM,
Turbo Core 2.0,
PowerNow!,
ECC
Piledriver Core (Vishera, 32 nm)
* Codenamed: ''Vishera''
* L1 data cache (per core): 16 kb
* L1 instruction cache (per module): 64 kb
* L2 cache (per module): 2048 kb
* All models support:
MMX(+),
SSE1 -
2 -
3 -
3s -
4.1 -
4.2 -
4a,
NX bit
The NX bit (no-execute bit) is a processor feature that separates areas of a virtual address space (the memory layout a program uses) into sections for storing data or program instructions. An operating system supporting the NX bit can mark certai ...
,
AMD64,
AMD-V
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU.
In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware- ...
,
IOMMU,
,
CLMUL,
AVX,
AVX 1.1,
XOP,
FMA3
The FMA instruction set is an extension to the 128- and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations. There are two variants:
* FMA4 is supported in AM ...
,
FMA4,
F16C,
ABM,
BMI1,
TBM,
Turbo Core 3.0,
PowerNow!, EVP (Enhanced Virus Protection),
ECC
Notes
* AMD later re-used the FX designation for some processors in its socket FM2/FM2+
APU lineup.
* The FX-9590 and FX-9370 originally launched as OEM exclusive parts which retailers listed for $920 and $576 respectively.
By October they were released to retail channels in a kit with a liquid cooler at $390 and $290.
#
^ All models support AMD Turbo Core, v2.0 for BULLDOZER and v3.0 for PILEDRIVER.
#
^ The clock multiplier is applied to the 200 MHz
HyperTransport base clock.
#
^ A line of Socket F and Socket AM2 processors launched in 2006 were named Athlon 64 FX, the first being the AMD FX-60.
#
^ A Line of Phenom FX processors was revealed May 2007 and was branded the "FASN8" platform.
#
^ Sold with a liquid cooling kit.
See also
*
AMD FX
*
List of AMD chipsets
This is an overview of chipsets sold under the AMD brand, manufactured before May 2004 by the company itself, before the adoption of open platform approach as well as chipsets manufactured by ATI Technologies after October 2006 as the complet ...
*
List of AMD accelerated processing units – desktop, mobile and ultra-low-power
*
List of AMD Opteron processors – server
*
Table of AMD processors
References
External links
AMD FX Processors
{{DEFAULTSORT:AMD FX microprocessors
*
Lists of microprocessors