An interrupt vector table (IVT) is a

data structure In computer science, a data structure is a data organization and storage format that is usually chosen for Efficiency, efficient Data access, access to data. More precisely, a data structure is a collection of data values, the relationships amo ...

that associates a list of

interrupt handler In computer systems programming, an interrupt handler, also known as an interrupt service routine (ISR), is a special block of code associated with a specific interrupt condition. Interrupt handlers are initiated by hardware interrupts, software ...

s with a list of

interrupt request In a computer, an interrupt request (or IRQ) is a hardware signal sent to the processor that temporarily stops a running program and allows a special program, an interrupt handler, to run instead. Hardware interrupts are used to handle events s ...

s in a table of interrupt vectors. Each entry of the interrupt vector table, called an interrupt vector, is the address of an interrupt handler (also known as ISR). While the concept is common across processor architectures, IVTs may be implemented in architecture-specific fashions. For example, a dispatch table is one method of implementing an interrupt vector table.

Background

Most processors have an interrupt vector table, including chips from

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, Microchip Atmel, NXP, ARM, etc.

Interrupt handlers

Handling methods

An interrupt vector table is used in the three most popular methods of finding the starting address of the interrupt service routine:

"Predefined"

The "predefined" method loads the

program counter The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, ...

(PC) directly with the address of some entry inside the interrupt vector table. The jump table itself contains executable code. While in principle an extremely short interrupt handler could be stored entirely inside the interrupt vector table, in practice the code at each entry is a single jump instruction that jumps to the full interrupt service routine (ISR) for that interrupt. The Intel 8080, Atmel AVR Gary Hill
"Atmel AVR Interrupt and Timing Subsystems: ATMEGA328P interrupt vector table"
/ref> and all 8051 and Microchip microcontrollers use the predefined approach.

"Fetch"

The "fetch" method loads the PC indirectly, using the address of some entry inside the interrupt vector table to pull an address out of that table, and then loading the PC with that address. Each and every entry of the IVT is the address of an interrupt service routine. All Motorola/Freescale microcontrollers use the fetch method.

"Interrupt acknowledge"

For the "interrupt acknowledge" method, the external device gives the CPU an interrupt handler number. The interrupt acknowledge method is used by the Intel Pentium and many older microprocessors. When the CPU is affected by an

interrupt In digital computers, an interrupt (sometimes referred to as a trap) is a request for the processor to ''interrupt'' currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted ...

, it looks up the

in the interrupt vector table, and transfers control to it.

References

External links

Intel® Architecture Software Developer's Manual, Volume 3: System Programming Guide
*
Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A:System Programming Guide, Part 1
(see CHAPTER 6, INTERRUPT AND EXCEPTION HANDLING and CHAPTER 10, ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER)] *{{webarchive, url=https://web.archive.org/web/20160304054440/http://www.tcd.ie/Engineering/Courses/BAI/JS_Subjects/3D1/Documents/Handouts/ExVecTab.pdf, title=Motorola M68000 Exception and Vector Table Interrupts