The Intel Ultra Path Interconnect (UPI)
is a point-to-point
processor interconnect developed by
Intel which replaced the
Intel QuickPath Interconnect (QPI) in
Xeon Skylake-SP platforms starting in 2017.
Interconnect
UPI is a
low-latency coherent interconnect for scalable
multiprocessor systems with a shared
address space
In computing, an address space defines a range of discrete addresses, each of which may correspond to a network host, peripheral device, disk sector, a memory cell or other logical or physical entity.
For software programs to save and retrieve st ...
. It uses a directory-based home
snoop coherency protocol with a transfer speed of up to 10.4
GT/s. Supporting processors typically have two or three UPI links.
Comparing to QPI, it improves power efficiency with a new low-power state, improves transfer efficiency with a new packetization format, and improves scalability with protocol layer that does not require preallocation of resources.
UPI only supports directory-based coherency, unlike previous QPI processors which supported multiple snoop modes (no snoop, early snoop, home snoop, and directory).
A combined caching and home agent (CHA) handles resolution of coherency across multiple processors, as well as snoop requests from processor cores and local and remote agents. Separate physical CHAs are placed within each processor core and
last level cache (LLC) bank to improve scalability according to the number of cores, memory controllers, or the sub-
NUMA clustering mode. The address space is interleaved across different CHAs, which act like a single logical agent.
See also
*
HyperTransport
*
Front-side bus
References
External links
Intel® Xeon® Processor Scalable Family Technical Overview
{{DEFAULTSORT:Intel UltraPath Interconnect
Computer buses
UltraPath Interconnect
Serial buses