Features
Quartus Prime software features include: * Platform Designer (previously QSys, previously SOPC Builder), a tool that eliminates manual system integration tasks by automatically generating interconnect logic and creating a testbench to verify functionality. * SoCEDS, a set of development tools, utility programs, run-time software, and application examples to help you develop software for SoC FPGA embedded systems. * DSP Builder, a tool that creates a seamless bridge between the MATLAB/Simulink tool and Quartus Prime software, so FPGA designers have the algorithm development, simulation, and verification capabilities of MATLAB/Simulink system-level design tools * External memory interface toolkit, which identifies calibration issues and measures the margins for each DQS signal. * Generation of JAM/STAPL files for JTAG in-circuit device programmers.Editions
Source:Lite Edition
The Lite Edition is the free version of Quartus Prime Standard Edition and lacks certain features such as partial reconfiguration, design partitioning, register retiming and transceiver link analysis tools. This edition provides compilation and programming for a limited number of Altera FPGA devices, mainly the low-cost Cyclone FPGAs, as well as the MAX family of CPLDs. This enables small developers and educational institutions access to development tools without overhead from the cost of development software.Standard Edition
The Standard Edition supports an extensive number of FPGA devices and is more full-featured than the Lite Edition, but requires a paid license.Pro Edition
The Pro Edition is a newer version of the tools with the latest features and supporting recent Altera FPGA device families. Typically the Pro Edition requires a paid license, but for certain device families, Altera offers a free license.See also
* Xilinx ISE *References
External links