Integrated circuit layout, also known IC layout, IC mask layout, or mask design, is the representation of an integrated circuit in terms of planar

geometric shape A shape or figure is a graphical representation of an object or its external boundary, outline, or external surface, as opposed to other properties such as color, texture, or material type. A plane shape or plane figure is constrained to lie ...

s which correspond to the patterns of

metal A metal (from Greek μέταλλον ''métallon'', "mine, quarry, metal") is a material that, when freshly prepared, polished, or fractured, shows a lustrous appearance, and conducts electricity and heat relatively well. Metals are typi ...

, oxide, or

semiconductor A semiconductor is a material which has an electrical conductivity value falling between that of a conductor, such as copper, and an insulator, such as glass. Its resistivity falls as its temperature rises; metals behave in the opposite way. ...

layers that make up the components of the integrated circuit. Originally the overall process was called tapeout as historically early ICs used graphical black crepe tape on mylar media for photo imaging (erroneously believed to reference magnetic data—the photo process greatly predated magnetic media). When using a standard process—where the interaction of the many chemical, thermal, and photographic variables is known and carefully controlled—the behaviour of the final integrated circuit depends largely on the positions and interconnections of the geometric shapes. Using a computer-aided layout tool, the layout engineer—or layout technician—places and connects all of the components that make up the chip such that they meet certain criteria—typically: performance, size, density, and manufacturability. This practice is often subdivided between two primary layout disciplines: Analog and digital. The generated layout must pass a series of checks in a process known as physical verification. The most common checks in this verification process are * design rule checking (DRC), * layout versus schematic (LVS), * parasitic extraction, * antenna rule checking, and * electrical rule checking (ERC). When all verification is complete, layout post processing is applied where the data is also translated into an industry-standard format, typically GDSII, and sent to a semiconductor foundry. The milestone completion of the layout process of sending this data to the foundry is now colloquially called " tapeout". The foundry converts the data into mask data and uses it to generate the

photomask A photomask is an opaque plate with holes or transparencies that allow light to shine through in a defined pattern. They are commonly used in photolithography and the production of integrated circuits (ICs or "chips") in particular. Masks are used ...

s used in a photolithographic process of

semiconductor device fabrication Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuit (IC) chips such as modern computer processors, microcontrollers, and memory chips such as NAND flash and DRAM that are pres ...

. In the earlier, simpler, days of IC design, layout was done by hand using opaque tapes and films, an evolution derived from early days of

printed circuit board A printed circuit board (PCB; also printed wiring board or PWB) is a medium used in electrical and electronic engineering to connect electronic components to one another in a controlled manner. It takes the form of a laminated sandwich str ...

(PCB) design --

tape-out In electronics and photonics design, tape-out or tapeout is the final result of the design process for integrated circuits or printed circuit boards before they are sent for manufacturing. The tapeout is specifically the point at which the graph ...

. Modern IC layout is done with the aid of

IC layout editor An Integrated circuit layout editor or IC layout editor is an electronic design automation software tool that allows a user to digitize the shapes and patterns that form an integrated circuit. Typically the view will include the components (usual ...

software, mostly automatically using EDA tools, including

place and route Place and route is a stage in the design of printed circuit boards, integrated circuits, and field-programmable gate arrays. As implied by the name, it is composed of two steps, placement and routing. The first step, placement, involves deciding ...

tools or schematic-driven layout tools. Typically this involves a library of standard cells. The manual operation of choosing and positioning the geometric shapes is informally known as "

polygon In geometry, a polygon () is a plane figure that is described by a finite number of straight line segments connected to form a closed '' polygonal chain'' (or ''polygonal circuit''). The bounded plane region, the bounding circuit, or the two t ...

pushing". Riko Radojcic
"Managing More-than-Moore Integration Technology Development"
2018. p. 99

See also

References

Further reading