Dynamic timing verification refers to verifying that an

ASIC An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-effici ...

design is fast enough to run without errors at the targeted clock rate. This is accomplished by simulating the design files used to synthesize the integrated circuit (IC) design. This is in contrast to

static timing analysis Static timing analysis (STA) is a simulation method of computing the expected timing of a synchronous digital circuit without requiring a simulation of the full circuit. High-performance integrated circuits have traditionally been character ...

, which has a similar goal as dynamic timing verification except it does not require simulating the real functionality of the IC."ASIC world: vol 10", page 13, October 2003 Hobbyists often perform a type of dynamic timing verification when they over-clock the CPUs in their computers in order to find the fastest clock rate at which they can run the CPU without errors. This is a type of dynamic timing verification that is performed after the silicon is manufactured. In the field of ASIC design, this timing verification is preferably performed before manufacturing the IC in order to make sure that IC works under the required conditions before mass production of the IC.

References

{{Reflist Timing in electronic circuits Formal methods