The ARM Cortex-A57 is a
central processing unit
A central processing unit (CPU), also called a central processor, main processor, or just processor, is the primary Processor (computing), processor in a given computer. Its electronic circuitry executes Instruction (computing), instructions ...
implementing the
ARMv8-A
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of RISC instruction set architectures (ISAs) for computer processors. Arm Holdings develops the ISAs and lice ...
64-bit
instruction set
In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, s ...
designed by
ARM Holdings
Arm Holdings plc (formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a British semiconductor and software design company based in Cambridge, England, whose primary business is the design of central processing ...
. The Cortex-A57 is an
out-of-order superscalar
A superscalar processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single in ...
pipeline.
It is available as
SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g.
GPU,
display controller
A video display controller (VDC), also called a display engine or display interface, is an integrated circuit which is the main component in a video-signal generator, a device responsible for the production of a TV video signal in a computing ...
,
DSP,
image processor
An image processor, also known as an image processing engine, image processing unit (IPU), or image signal processor (ISP), is a type of media processor or specialized digital signal processor (DSP) used for image processing, in digital cameras o ...
, etc.) into one
die constituting a
system on a chip
A system on a chip (SoC) is an integrated circuit that combines most or all key components of a computer or Electronics, electronic system onto a single microchip. Typically, an SoC includes a central processing unit (CPU) with computer memory, ...
(SoC).
Overview
* Pipelined processor with deeply
out of order,
speculative issue 3-way
superscalar
A superscalar processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single in ...
execution pipeline
* DSP and
NEON
Neon is a chemical element; it has symbol Ne and atomic number 10. It is the second noble gas in the periodic table. Neon is a colorless, odorless, inert monatomic gas under standard conditions, with approximately two-thirds the density of ...
SIMD
Single instruction, multiple data (SIMD) is a type of parallel computer, parallel processing in Flynn's taxonomy. SIMD describes computers with multiple processing elements that perform the same operation on multiple data points simultaneousl ...
extensions are mandatory per core
*
VFPv4 Floating Point Unit onboard (per core)
*
Hardware virtualization
Hardware virtualization is the virtualization of computers as complete hardware platforms, certain logical abstractions of their componentry, or only the functionality required to run various operating systems. Virtualization emulates the hardw ...
support
*
Thumb-2
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer, RISC instruction set architectures (ISAs) for central processing unit, com ...
instruction set encoding reduces the size of 32-bit programs with little impact on performance.
*
TrustZone security extensions
* Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution
* 32 KiB data (2-way set-associative) + 48 KiB instruction (3-way set-associative) L1 cache per core
* Integrated low-latency level-2 (16-way set-associative) cache controller, 512 KB, 1 MB, or 2 MB configurable size per cluster
* 48-entry fully associative L1 instruction Translation Lookaside Buffer (TLB) with native support for 4 KiB, 64 KiB, and 1 MB page sizes
** 4-way set-associative of 1024-entry L2 TLB
* 2-level dynamic predictor with Branch Target Buffer (BTB) for fast target generation
* Static branch predictor
* Indirect predictor
* Return stack
Chips
In January 2014,
AMD
Advanced Micro Devices, Inc. (AMD) is an American multinational corporation and technology company headquartered in Santa Clara, California and maintains significant operations in Austin, Texas. AMD is a hardware and fabless company that de ...
announced the
Opteron A1100. Intended for servers, the A1100 has four or eight Cortex-A57 cores, support for up to 128 GiB of
DDR3
Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high Bandwidth (computing), bandwidth ("double data rate") interface, and has been in use since 2007. ...
or
DDR4 RAM, an eight-lane
PCIe
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripher ...
controller, eight SATA (6 Gbit/s) ports, and two
10 Gigabit Ethernet
10 Gigabit Ethernet (abbreviated 10GE, 10GbE, or 10 GigE) is a group of computer networking technologies for transmitting Ethernet frames at a rate of 10 gigabits per second. It was first defined by the IEEE 802.3ae-2002 standard. Unlik ...
ports. The A1100 series was released in January 2016, with four and eight core versions.
Qualcomm
Qualcomm Incorporated () is an American multinational corporation headquartered in San Diego, California, and Delaware General Corporation Law, incorporated in Delaware. It creates semiconductors, software and services related to wireless techn ...
's first offering which was made available for sampling Q4 2014 was the
Snapdragon 810.
It contains four Cortex-A57 and four
Cortex-A53
The ARM Cortex-A53 is one of the first two central processing units implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Cambridge design centre, along with the Cortex-A57. The Cortex-A53 is a 2-wide decode superscalar pr ...
cores in a
big.LITTLE configuration.
Samsung
Samsung Group (; stylised as SΛMSUNG) is a South Korean Multinational corporation, multinational manufacturing Conglomerate (company), conglomerate headquartered in the Samsung Town office complex in Seoul. The group consists of numerous a ...
also provides Cortex-A57-based
SoC's, the first one being
Exynos Octa 5433 which was available for sampling from Q4 2014.
In March, 2015,
Nvidia
Nvidia Corporation ( ) is an American multinational corporation and technology company headquartered in Santa Clara, California, and incorporated in Delaware. Founded in 1993 by Jensen Huang (president and CEO), Chris Malachowsky, and Curti ...
released the
Tegra X1 SoC, which has four A57 cores running at a maximum of 2 GHz.
See also
*
ARM Cortex-A15, predecessor
*
ARM Cortex-A72
The ARM Cortex-A72 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Austin design centre. The Cortex-A72 is a 3-way decode out-of-order superscalar pipeline. It is available as SIP core t ...
, successor
*
Comparison of ARMv8-A cores, ARMv8 family
*
Comparison of ARMv7-A cores, ARMv7 family
References
External links
*
*
{{Clear
ARM processors