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Catapult C Synthesis, a commercial
electronic design automation Electronic design automation (EDA), also referred to as electronic computer-aided design (ECAD), is a category of software tools for designing Electronics, electronic systems such as integrated circuits and printed circuit boards. The tools wo ...
product of
Mentor Graphics Mentor Graphics Corporation was a US-based electronic design automation (EDA) multinational corporation for electrical engineering and electronics, headquartered in Wilsonville, Oregon. Founded in 1981, the company distributed products that ass ...
, is a
high-level synthesis High-level synthesis (HLS), sometimes referred to as C synthesis, electronic system-level (ESL) synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that takes an abstract behavioral specification of a digital ...
tool, sometimes called algorithmic synthesis or ESL synthesis. Catapult C takes
ANSI C ANSI C, ISO C, and Standard C are successive standards for the C programming language published by the American National Standards Institute (ANSI) and ISO/IEC JTC 1/SC 22/WG 14 of the International Organization for Standardization (ISO) and the ...
/ C++ and
SystemC SystemC is a set of C++ classes and macros which provide an event-driven simulation interface (see also discrete event simulation). These facilities enable a designer to ''simulate'' concurrent processes, each described using plain C++ synta ...
inputs and generates register transfer level (RTL) code targeted to
FPGA A field-programmable gate array (FPGA) is a type of configurable integrated circuit that can be repeatedly programmed after manufacturing. FPGAs are a subset of logic devices referred to as programmable logic devices (PLDs). They consist of a ...
s and
ASIC An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficien ...
s.


History

In 2004, Mentor Graphics formally announced its Catapult C high level synthesis product offering hierarchical design support for synthesizing pipelined, multi-block subsystems from untimed ANSI C/C++ descriptions. Catapult C's main functionality was generating RTL (
VHDL VHDL (Very High Speed Integrated Circuit Program, VHSIC Hardware Description Language) is a hardware description language that can model the behavior and structure of Digital electronics, digital systems at multiple levels of abstraction, ran ...
and
Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits, with the highest level of abstraction being at the re ...
) targeted to ASICs and FPGAs. Users specified constraints for timing and area, and provided a clock period and destination technology. Mentor also announced a Catapult C Library Builder for ASIC Designers to collect detailed characterization data. In 2005, Mentor announced extensions to Catapult C to automatically create SystemC transaction-level models and wrappers, for simulation of the design in verification environments supporting SystemC. Mentor also introduced interface synthesis to map the data transfer implied by passing of C++ function arguments to hardware interfaces such as wires, registers, handshakes registers, memories, buses or more complex user-defined interfaces. In 2006, Mentor announced Catapult SL (System Level) for automatically creating signal processing subsystems. Catapult SL could coordinate the partitioning of sequential C operations into multiple blocks within the subsystem, including partitioning into multiple clock domains. Catapult SL automatically inserts appropriate inter-block channels and memory buffers to assemble the sub-system. In January 2009, Mentor announced an integration between Catapult C and its Vista SystemC design and simulation environment to automatically generate transaction-level models (TLM). In this process, the untimed ANSI C++ input to Catapult is encapsulated in a TLM wrapper; timing information is extracted from the synthesis results and back-annotated in the resulting model. The flow is compatible with the TLM-2.0 standard from the Open SystemC Initiative (OSCI). In June 2009, Mentor announced that it enhanced Catapult C with the ability to synthesize control logic, create power-optimized RTL netlists, with automatic multi-level clock gating, and an automated verification flow to enable a debug of the RTL against the original C++ input. In January 2010, Mentor announced the ability for Catapult C to take direct SystemC input, including both cycle-based and transaction level (TLM) support. In May 2011, Mentor announced that Catapult C supported TLM synthesis. Abstract TLM models are converted to pin-accurate, protocol-specific, SystemC models, and from there, synthesized to RTL code. Existing synthesizable descriptions can be converted to TLMs. In August 2011, Catapult C was acquired by Calypto Design Systems. In September 2015, Mentor Graphics acquired Calypto Design Systems, thus reacquiring Catapult C.


Features

CatapultC synthesizes ANSI C/C++ without proprietary extensions. The C/C++ language support includes pointers, classes, templates, template specialization and operator overloading, which facilitate design reuse methodology over RTL code. Catapult C supports both algorithmic and control logic synthesis. Designers do iterations with CatC to pick their preferred micro architecture for specified performance and area constraints. Catapult has a graphic user interface with a visual view of the hardware circuit it is scheduling, as well as the clock reference between the C code and the Verilog RTL code. Catapult C has 3 types of simulation using the original C/C++ testbench: Cycle-based, RTL-based, and Gate-Level based. Catapult C supports SystemC model generation intended for virtual platforms, and a SystemC test environment to verify the generated RTL against the original C++ using the original C++ testbench. Catapult C supports the synthesis of Transaction Level Models (TLM), including standard off-the-shelf bus interfaces and custom protocols.EETime
Mentor’s TLM Synthesis links virtual prototyping and hardware implementation
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Competing HLS Products

* Stratus HLS from
Cadence Design Systems Cadence Design Systems, Inc. (stylized as cādence)Investor's Business DailCEO Lip-Bu Tan Molds Troubled Cadence Into Long-Term LeaderRetrieved November 12, 2020 is an American multinational corporation, multinational technology and computational ...
* Vivado HLS from
Xilinx Xilinx, Inc. ( ) was an American technology and semiconductor company that primarily supplied programmable logic devices. The company is renowned for inventing the first commercially viable field-programmable gate array (FPGA). It also pioneered ...
(formerly, AutoPilot fro
AutoESL
* Intel HLS from
Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and Delaware General Corporation Law, incorporated in Delaware. Intel designs, manufactures, and sells computer compo ...
(formerly a++ from Altera) * BlueSpec Compiler fro
BlueSpec
* Impulse C CoDeveloper fro
Impulse Accelerated Technologies
* Synphony C Compiler from
Synopsys Synopsys, Inc. is an American electronic design automation (EDA) company headquartered in Sunnyvale, California, that focuses on silicon design and verification, silicon intellectual property and software security and quality. Synopsys sup ...
* LegUp fro
University of Toronto
* CyberWorkBench from NE

* C-to-Verilog fro
C-to-Verilog.com
* eXCite fro
Y Explorations

ParC
C++ extended for parallel processing and hardware description * HDL Coder from
MathWorks The MathWorks, Inc. is an American privately held corporation that specializes in mathematical computing software. Its major products include MATLAB and Simulink, which support data analysis and simulation. History MATLAB was created in the 1 ...
* PandA-Bambu HLS from Politecnico di Milan


References

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External links


Calypto Design Systems Catapult C Synthesis Product PageMentor Graphics Catapult C Synthesis Product PageESL and High-Level Synthesis CommunitiesTransforming an ANSI C code with OpenMP directives into a SystemC descriptionAutomated synthesis and verification of embedded systems: wishful thinking or reality?
Electronic design automation software