The F16C (previously/informally known as CVT16) instruction set is an
x86 instruction set architecture
In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ...
extension which provides support for converting between
half-precision
In computing, half precision (sometimes called FP16) is a binary floating-point computer number format that occupies 16 bits (two bytes in modern computers) in computer memory. It is intended for storage of floating-point values in applications wh ...
and standard IEEE
single-precision floating-point format
Single-precision floating-point format (sometimes called FP32 or float32) is a computer number format, usually occupying 32 bits in computer memory; it represents a wide dynamic range of numeric values by using a floating radix point.
A floatin ...
s.
History
The CVT16 instruction set, announced by
AMD on May 1, 2009, is an extension to the 128-bit
SSE core instructions in the
x86 and
AMD64
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mo ...
instruction set.
CVT16 is a revision of part of the
SSE5 instruction set proposal announced on August 30, 2007, which is supplemented by the
XOP and
FMA4 instruction sets. This revision makes the binary coding of the proposed new instructions more compatible with
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the devel ...
's
AVX AVX may refer to:
Technology
* Advanced Vector Extensions, an instruction set extension in the x86 microprocessor architecture
** AVX2, an expansion of the AVX instruction set
** AVX-512, 512-bit extensions to the 256-bit AVX
* AVX Corporation, ...
instruction extensions, while the functionality of the instructions is unchanged.
In recent documents, the name F16C is formally used in both
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the devel ...
and
AMD x86-64
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging ...
architecture specifications.
Technical information
There are variants that convert four floating-point values in an
XMM register or 8 floating-point values in a
YMM register.
The instructions are abbreviations for "vector convert packed half to packed single" and vice versa:
*
VCVTPH2PS xmmreg,xmmrm64 convert four half-precision floating point values in memory or the bottom half of an XMM register to four single-precision floating-point values in an XMM register.
*
VCVTPH2PS ymmreg,xmmrm128 convert eight half-precision floating point values in memory or an XMM register (the bottom half of a YMM register) to eight single-precision floating-point values in a YMM register.
*
VCVTPS2PH xmmrm64,xmmreg,imm8 convert four single-precision floating point values in an XMM register to half-precision floating-point values in memory or the bottom half an XMM register.
*
VCVTPS2PH xmmrm128,ymmreg,imm8 convert eight single-precision floating point values in a YMM register to half-precision floating-point values in memory or an XMM register.
The 8-bit immediate argument to
VCVTPS2PH selects the
rounding
Rounding means replacing a number with an approximate value that has a shorter, simpler, or more explicit representation. For example, replacing $ with $, the fraction 312/937 with 1/3, or the expression with .
Rounding is often done to obta ...
mode. Values 0–4 select nearest, down, up, truncate, and the mode set in
MXCSR.RC.
Support for these instructions is indicated by bit 29 of ECX after
CPUID with EAX=1.
CPUs with F16C
*
AMD:
**
Jaguar-based processors and newer
**
Puma-based processors and newer
** "Heavy Equipment" processors
***
Bulldozer-based processors, Q4 2011
***
Piledriver-based processors, Q4 2012
***
Steamroller-based processors, Q1 2014
***
Excavator-based processors and newer, 2015
**
Zen-based processors, Q1 2017
**
Zen+-based processors, Q2 2018
**
Zen2-based processors, Q3 2019
*
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the devel ...
:
**
Ivy Bridge processors and newer
References
External links
* New Bulldozer and Piledriver Instruction
* DirectX math F16C and FMA
* AMD64 Architecture Programmer's Manual Volume
* AMD64 Architecture Programmer's Manual Volume
* AMD64 Architecture Programmer's Manual Volume
* AMD64 Architecture Programmer's Manual Volume
* AMD64 Architecture Programmer's Manual Volume
* IA32 Architectures Software Developer Manua
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X86 instructions
AMD technologies