supercomputer
A supercomputer is a type of computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second (FLOPS) instead of million instruc ...
that was designed, manufactured, and marketed by
Control Data Corporation
Control Data Corporation (CDC) was a mainframe and supercomputer company that in the 1960s was one of the nine major U.S. computer companies, which group included IBM, the Burroughs Corporation, and the Digital Equipment Corporation (DEC), the N ...
(CDC). It was one of the first machines to use a
vector processor
In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set where its instructions are designed to operate efficiently and effectively on large one-dimensional arrays of data called ...
to improve performance on appropriate scientific applications. It was also the first supercomputer to use
integrated circuit
An integrated circuit (IC), also known as a microchip or simply chip, is a set of electronic circuits, consisting of various electronic components (such as transistors, resistors, and capacitors) and their interconnections. These components a ...
s and the first to be equipped with one million
words
A word is a basic element of language that carries meaning, can be used on its own, and is uninterruptible. Despite the fact that language speakers often have an intuitive grasp of what a word is, there is no consensus among linguists on its ...
of
computer memory
Computer memory stores information, such as data and programs, for immediate use in the computer. The term ''memory'' is often synonymous with the terms ''RAM,'' ''main memory,'' or ''primary storage.'' Archaic synonyms for main memory include ...
.
STAR is a blend of ''STrings'' (of binary digits) and ''ARrays.'' The 100 alludes to the nominal peak processing speed of 100 million floating point operations per second ( MFLOPS); the earlier CDC 7600 provided peak performance of 36 MFLOPS but more typically ran at around 10 MFLOPS.
The design was part of a bid made to
Lawrence Livermore National Laboratory
Lawrence Livermore National Laboratory (LLNL) is a Federally funded research and development centers, federally funded research and development center in Livermore, California, United States. Originally established in 1952, the laboratory now i ...
(LLNL) in the mid-1960s. Livermore was looking for a partner who would build a much faster machine on their own budget and then lease the resulting design to the lab. It was announced publicly in the early 1970s, and on 17 August 1971, CDC announced that
General Motors
General Motors Company (GM) is an American Multinational corporation, multinational Automotive industry, automotive manufacturing company headquartered in Detroit, Michigan, United States. The company is most known for owning and manufacturing f ...
had placed the first commercial order for it.
A number of basic design features of the machine meant that its real-world performance was much lower than expected when first used commercially in 1974, and was one of the primary reasons CDC was pushed from its former dominance in the supercomputer market when the Cray-1 was announced in 1975. Only three STAR-100 systems were delivered, two to LLNL and another to NASA Langley Research Center.
Description
The STAR had a 64-bit
architecture
Architecture is the art and technique of designing and building, as distinguished from the skills associated with construction. It is both the process and the product of sketching, conceiving, planning, designing, and construction, constructi ...
, consisting of 195 instructions. Its main innovation was the inclusion of 65 vector instructions for
vector processing
In computing, a vector processor or array processor is a central processing unit (CPU) that implements an instruction set where its Instruction (computer science), instructions are designed to operate efficiently and effectively on large Array d ...
. The operations performed by these instructions were strongly influenced by concepts and operators from the APL programming language; in particular, the concept of "control vectors" (vector masks in modern terminology), and several instructions for vector permutation with control vectors, were carried over directly from APL.
The vector instructions operated on vectors that were stored in consecutive locations in main memory; memory addressing was virtual. The vector instructions fed an arithmetic
pipeline
A pipeline is a system of Pipe (fluid conveyance), pipes for long-distance transportation of a liquid or gas, typically to a market area for consumption. The latest data from 2014 gives a total of slightly less than of pipeline in 120 countries ...
; a single instruction could add two variable-length vectors of up to 65,535 elements with just one instruction fetch. The STAR also fetched vector operands in 512-bit units (superwords), reducing average memory latency.
Since the memory location of the "next" operand is known, the CPU can fetch the next operands while it is operating on the previous ones. As with instruction pipelines in general, the time needed to complete any one instruction was no better than it was before, but since the CPU is working on a number of data points at once, the overall performance dramatically improves.
Many of the STAR's instructions were complex, especially the ''vector macro'' instructions, which performed complex operations that normally would have required long sequences of instructions. These instructions, along with the STAR's generally complex architecture, was implemented with
microcode
In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. It consists of a set of hardware-level instructions ...
.
Main memory had a capacity of 65,536 512-bit
words
A word is a basic element of language that carries meaning, can be used on its own, and is uninterruptible. Despite the fact that language speakers often have an intuitive grasp of what a word is, there is no consensus among linguists on its ...
, called superwords (SWORDs). Main memory was 32-way interleaved to pipeline memory accesses. It was constructed from core memory with an access time of 1.28 μs. The main memory was accessed via a 512-bit bus, controlled by the ''storage access controller'' (SAC), which handled requests from the ''stream unit''. The stream unit accesses the main memory through the SAC via three 128-bit data buses, two for reads, and one for writes. There is also a 128-bit data bus for instruction fetch, I/O, and control vector access. The stream unit serves as the control unit, fetching and decoding instructions, initiating memory accesses on the behalf of the pipelined functional units, and controlling instruction execution, among other tasks. It also contains two read buffers and one write buffer for streaming data to the execution units.
The STAR-100 has two arithmetic pipelines. The first has a floating point adder and multiplier, and the second can execute all scalar instructions. It also contains a floating point adder, multiplier, and divider. Both pipelines are 64-bit for floating point operations and are controlled by microcode. The STAR-100 can split its floating point pipelines into four 32-bit pipelines, doubling the peak performance of the system to 100 MFLOPS at the expense of half the precision.
The STAR-100 uses I/O processors to offload I/O from the CPU. Each I/O processor is a 16-bit
minicomputer
A minicomputer, or colloquially mini, is a type of general-purpose computer mostly developed from the mid-1960s, built significantly smaller and sold at a much lower price than mainframe computers . By 21st century-standards however, a mini is ...
with its own main memory of 65,536 words of 16 bits each, which is implemented with core memory. The I/O processors all share a 128-bit data bus to the SAC.
Real-world performance, users and impact
The STAR-100's real-world performance was a fraction of its theoretical performance for a number of reasons. Firstly, the vector instructions, being "memory-to-memory," had a relatively long startup time, since the pipeline from the memory to the functional units was very long. In contrast to the register-based pipelined functional units in the 7600, the STAR pipelines were much deeper. The problem was compounded by the fact that the STAR had a slower cycle time than the 7600 (40 ns vs 27.5 ns). So the vector length needed for the STAR to run faster than the 7600 occurred at about 50 elements; if the loops were working on data sets with fewer elements, the time cost of setting up the vector pipeline was higher than the time savings provided by the vector instruction(s).
When the machine was released in 1974, it quickly became apparent that the general performance was disappointing. Very few programs can be effectively vectorized into a series of single instructions; nearly all calculations will rely on the results of some earlier instruction, yet the results had to clear the pipelines before they could be fed back in. This forced most programs to pay the high setup cost of the vector units, and generally the ones that did "work" were extreme examples. Worse, basic scalar performance was sacrificed to improve vector performance. Any time that the program had to run scalar instructions, the overall performance of the machine dropped dramatically. (See Amdahl's Law.)
Two STAR-100 systems were eventually delivered to the
Lawrence Livermore National Laboratory
Lawrence Livermore National Laboratory (LLNL) is a Federally funded research and development centers, federally funded research and development center in Livermore, California, United States. Originally established in 1952, the laboratory now i ...
and one to NASA
Langley Research Center
The Langley Research Center (LaRC or NASA Langley), located in Hampton, Virginia, near the Chesapeake Bay front of Langley Air Force Base, is the oldest of NASA's field centers. LaRC has focused primarily on aeronautical research but has also ...
. In preparation for the STAR deliveries, LLNL programmers developed a
library
A library is a collection of Book, books, and possibly other Document, materials and Media (communication), media, that is accessible for use by its members and members of allied institutions. Libraries provide physical (hard copies) or electron ...
of
subroutine
In computer programming, a function (also procedure, method, subroutine, routine, or subprogram) is a callable unit of software logic that has a well-defined interface and behavior and can be invoked multiple times.
Callable units provide a ...
s, called ''STACKLIB'', on the 7600 to emulate the vector operations of the STAR. In the process of developing STACKLIB, they found that programs converted to use it ran faster than they had before, even on the 7600. This placed further pressures on the performance of the STAR.
The STAR-100 was a disappointment to everyone involved. Jim Thornton, formerly
Seymour Cray
Seymour Roger Cray (September 28, 1925 – October 5, 1996) – was an American
CDC 1604 and 6600 projects and the chief designer of STAR, left CDC to form Network Systems Corporation. An updated version of the basic architecture was later released in 1979 as the Cyber 203, followed by the Cyber 205 in 1980, but by this point systems from Cray Research with considerably higher performance were on the market. The failure of the STAR led to CDC being pushed from its former dominance in the supercomputer market, something they tried to address with the formation of ETA Systems in September 1983.
Installations
Five CDC STAR-100s were built. Deliveries started from 1974:
* Control Data Corporation, Arden Hills, MN (2)
* Lawrence Livermore National Laboratory. (2)
* NASA Langley
References
Further reading
* R.G. Hintz and D.P. Tate, "Control Data STAR-100 processor design," ''Proc. Compcon'', 1972, pp. 1–4.
Charles Babbage Institute
The IT History Society (ITHS) is an organization that supports the history and scholarship of information technology by encouraging, fostering, and facilitating archival and historical research. Formerly known as the Charles Babbage Foundation, ...
, University of Minnesota. Engineers include Robert Moe, Wayne Specker, Dennis Grinna, Tom Rowan, Maurice Hutson, Curt Alexander, Don Pagelkopf, Maris Bergmanis, Dolan Toth, Chuck Hawley, Larry Krueger, Mike Pavlov, Dave Resnick, Howard Krohn, Bill Bhend, Kent Steiner, Raymon Kort, and Neil R. Lincoln. Discussion topics include CDC 1604,
CDC 6600
The CDC 6600 was the flagship of the 6000 series of mainframe computer systems manufactured by Control Data Corporation. Generally considered to be the first successful supercomputer, it outperformed the industry's prior recordholder, the I ...