Beetle (ASIC)
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ASIC An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficien ...
is an analog readout chip. It is developed for the
LHCb The LHCb (Large Hadron Collider beauty) experiment is a particle physics detector collecting data at the Large Hadron Collider at CERN. LHCb specializes in the measurements of the parameters of CP violation in the interactions of b- and c-hadro ...
experiment at
CERN The European Organization for Nuclear Research, known as CERN (; ; ), is an intergovernmental organization that operates the largest particle physics laboratory in the world. Established in 1954, it is based in Meyrin, western suburb of Gene ...
.


Overview

The chip integrates 128 channels with low-noise charge-sensitive pre-amplifiers and shapers. The pulse shape can be chosen such that it complies with
LHCb The LHCb (Large Hadron Collider beauty) experiment is a particle physics detector collecting data at the Large Hadron Collider at CERN. LHCb specializes in the measurements of the parameters of CP violation in the interactions of b- and c-hadro ...
specifications: a peaking time of 25 ns with a remainder of the peak voltage after 25 ns of less than 30%. A comparator per channel with configurable polarity provides a binary signal. Four adjacent comparator channels are being ORed and brought off chip via
LVDS Low-voltage differential signaling (LVDS), also known as TIA/EIA-644, is a technical standard that specifies electrical characteristics of a differential, serial signaling standard. LVDS operates at low power and can run at very high speeds u ...
drivers. Either the shaper or comparator output is sampled with the LHC bunch-crossing frequency of 40 MHz into an analog pipeline. This ring buffer has a programmable latency of a maximum of 160 sampling intervals and an integrated derandomising buffer of 16 stages. For analogue readout data is multiplexed with up to 40 MHz onto one or four ports. A binary readout mode operates at up to 80 MHz output rate on two ports. Current drivers bring the serialised data off chip. The chip can accept trigger rates up to 1.1 MHz to perform a dead-timeless readout within 900 ns per trigger. For testability and calibration purposes, a charge injector with adjustable pulse height is implemented. The bias settings and various other parameters can be controlled via a standard
I²C I2C (Inter-Integrated Circuit; pronounced as "" or ""), alternatively known as I2C and IIC, is a synchronous, multi-master/multi-slave, single-ended, serial communication bus invented in 1980 by Philips Semiconductors (now NXP Semiconduct ...
-interface. The chip is
radiation hardened Radiation hardening is the process of making electronic components and circuits resistant to damage or malfunction caused by high levels of ionizing radiation (particle radiation and high-energy electromagnetic radiation), especially for environm ...
to an accumulated dose of more than 100  Mrad. Robustness against single event upset is achieved by redundant logic.


External links


Beetle - a readout chip for LHCbThe Large Hadron Collider beauty experiment
Application-specific integrated circuits CERN {{particle-stub