Back end of the line or back end of line (BEOL) is a process in

semiconductor device fabrication Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories (such as Random-access memory, RAM and flash memory). It is a ...

that consists of depositing metal

interconnect In telecommunications, interconnection is the physical linking of a carrier's network with equipment or facilities not belonging to that network. The term may refer to a connection between a carrier's facilities and the equipment belonging to its ...

layers onto a wafer already patterned with devices. It is the second part of IC fabrication, after front end of line (FEOL). In BEOL, the individual devices (transistors, capacitors, resistors, etc.) are connected to each other according to how the metal wiring is deposited.

Metalization

The individual devices are connected by alternately stacking oxide layers (for insulation purposes) and metal layers (for the interconnect tracks). The vias between layers and the interconnects on the individual layers are thus formed using a structuring process. Common metals are

copper Copper is a chemical element; it has symbol Cu (from Latin ) and atomic number 29. It is a soft, malleable, and ductile metal with very high thermal and electrical conductivity. A freshly exposed surface of pure copper has a pinkish-orang ...

and

aluminum Aluminium (or aluminum in North American English) is a chemical element; it has chemical symbol, symbol Al and atomic number 13. It has a density lower than that of other common metals, about one-third that of steel. Aluminium has ...

. BEOL generally begins when the first layer of metal is deposited on the wafer. BEOL includes contacts, insulating layers (

dielectric In electromagnetism, a dielectric (or dielectric medium) is an Insulator (electricity), electrical insulator that can be Polarisability, polarised by an applied electric field. When a dielectric material is placed in an electric field, electric ...

s), metal levels, and bonding sites for chip-to-package connections. For modern IC processes, more than 10 metal layers can be added in the BEOL. Before 1998, practically all chips used aluminium for the metal interconnection layers, whereas copper is mostly used nowadays.

Steps

Steps of the BEOL are: # Silicidation of source and drain regions and the

polysilicon Polycrystalline silicon, or multicrystalline silicon, also called polysilicon, poly-Si, or mc-Si, is a high purity, polycrystalline form of silicon, used as a raw material by the solar photovoltaic and electronics industry. Polysilicon is produ ...

region. # Adding a dielectric (first, lower layer is pre-metal dielectric (PMD) – to isolate metal from silicon and polysilicon), CMP processing it # Make holes in PMD, make a contacts in them. # Add metal layer 1 # Add a second dielectric, called the inter-metal dielectric (IMD) # Make vias through dielectric to connect lower metal with higher metal. Vias filled by Metal CVD process. #:Repeat steps 4–6 to get all metal layers. # Add final passivation layer to protect the microchip After BEOL there is a "back-end process" (also called post-fab), which is done not in the cleanroom, often by a different company. It includes wafer test, wafer backgrinding, die separation, die tests, IC packaging and final test.

Metalization

Steps

See also

References

Further reading