Zero ASIC Corporation, formerly Adapteva, Inc., is a

fabless Fabless manufacturing is the design and sale of hardware devices and semiconductor chips while outsourcing their fabrication (or ''fab'') to a specialized manufacturer called a semiconductor foundry. These foundries are typically, but not exclu ...

semiconductor A semiconductor is a material with electrical conductivity between that of a conductor and an insulator. Its conductivity can be modified by adding impurities (" doping") to its crystal structure. When two regions with different doping level ...

company A company, abbreviated as co., is a Legal personality, legal entity representing an association of legal people, whether Natural person, natural, Juridical person, juridical or a mixture of both, with a specific objective. Company members ...

focusing on low power many core

microprocessor A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...

design. The company was the second company to announce a design with 1,000 specialized processing cores on a single

integrated circuit An integrated circuit (IC), also known as a microchip or simply chip, is a set of electronic circuits, consisting of various electronic components (such as transistors, resistors, and capacitors) and their interconnections. These components a ...

. Adapteva was founded in 2008 with the goal of bringing a ten times advancement in

floating-point In computing, floating-point arithmetic (FP) is arithmetic on subsets of real numbers formed by a ''significand'' (a Sign (mathematics), signed sequence of a fixed number of digits in some Radix, base) multiplied by an integer power of that ba ...

performance per watt In computing, performance per watt is a measure of the energy efficiency of a particular computer architecture or computer hardware. Literally, it measures the rate of computation that can be delivered by a computer for every watt of power con ...

for the mobile device market. Products are based on its Epiphany multi-core multiple instruction, multiple data (MIMD) architecture and its Parallella

Kickstarter Kickstarter, PBC is an American Benefit corporation, public benefit corporation based in Brooklyn, New York City, that maintains a global crowdfunding platform focused on creativity. The company's stated mission is to "help bring creative project ...

project promoting "a supercomputer for everyone" in September 2012. The company name is a combination of "adapt" and the Hebrew word "Teva" meaning nature.

History

Adapteva was founded in March 2008, by Andreas Olofsson. The company was founded with the goal of bringing a 10× advancement in

processing energy efficiency for the

mobile device A mobile device or handheld device is a computer small enough to hold and operate in hand. Mobile devices are typically battery-powered and possess a flat-panel display and one or more built-in input devices, such as a touchscreen or keypad. ...

market. In May 2009, Olofsson had a prototype of a new type of

massively parallel Massively parallel is the term for using a large number of computer processors (or separate computers) to simultaneously perform a set of coordinated computations in parallel. GPUs are massively parallel architecture with tens of thousands of ...

multi-core computer architecture. The initial prototype was implemented in 65 nm and had 16 independent microprocessor cores. The initial prototypes enabled Adapteva to secure US$1.5 million in series-A funding from BittWare, a company from

Concord, New Hampshire Concord () is the capital city of the U.S. state of New Hampshire and the county seat, seat of Merrimack County, New Hampshire, Merrimack County. As of the 2020 United States census the population was 43,976, making it the List of municipalities ...

, in October 2009. Adapteva's first commercial chip product started sampling to customers in early May 2011 and they soon thereafter announced the capability to put up to 4,096 cores on a single chip. The ''Epiphany III'', was announced in October 2011 using 28 nm and 65 nm manufacturing processes.

Products

Adapteva's main product family is the Epiphany scalable multi-core MIMD architecture. The Epiphany architecture could accommodate chips with up to 4,096

RISC In electronics and computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a comp ...

out-of-order

s, all sharing a single

32-bit In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in a maximum of 32- bit units. Compared to smaller bit widths, 32-bit computers can perform la ...

flat memory space. Each

processor in the Epiphany architecture is

superscalar A superscalar processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single in ...

with 64× 32-bit unified register file (integer or single-precision) microprocessor operating up to 1

GHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), often described as being equivalent to one event (or Cycle per second, cycle) per second. The hertz is an SI derived unit whose formal expression in ter ...

and capable of 2 GFLOPS (single-precision). Epiphany's RISC processors use a custom

instruction set architecture In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, ...

(ISA) optimised for single-precision floating-point, but are programmable in high level

ANSI C ANSI C, ISO C, and Standard C are successive standards for the C programming language published by the American National Standards Institute (ANSI) and ISO/IEC JTC 1/SC 22/WG 14 of the International Organization for Standardization (ISO) and the ...

using a standard GNU-GCC tool chain. Each RISC processor (in current implementations; not fixed in the architecture) has 32 KB of local memory. Code (possibly duplicated in each core) and stack space should be in that local memory; in addition (most) temporary data should fit there for full speed. Data can also be used from other processor cores local memory at a speed penalty, or off-chip RAM with much larger speed penalty. The memory architecture does not employ explicit hierarchy of hardware caches, similar to the Sony/Toshiba/IBM Cell processor, but with the additional benefit of off-chip and inter-core loads and stores being supported (which simplifies porting software to the architecture). It is a hardware implementation of partitioned global address space. This eliminated the need for complex cache coherency hardware, which places a practical limit on the number of cores in a traditional multicore system. The design allows the programmer to leverage greater foreknowledge of independent data access patterns to avoid the runtime cost of figuring this out. All processor nodes are connected through a network on chip, allowing efficient message passing.

Scalability

The architecture is designed to scale almost indefinitely, with 4 ''e-links'' allowing multiple chips to be combined in a grid topology, allowing for systems with thousands of cores.

Multi-core coprocessors

On August 19, 2012, Adapteva posted some specifications and information about Epiphany multi-core coprocessors. In September 2012, a 16-core version, the Epiphany-III (E16G301), was produced using 65 nm (11.5 mm, 500 MHz chipLinley Gwennap
Adapteva: More Flops, Less Watts. Epiphany Offers Floating-Point Accelerator for Mobile Processors.
//

Microprocessor Report ''Microprocessor Report'' is a newsletter covering the microprocessor industry. The publication is accessible only to paying subscribers. To avoid bias, it does not take advertisements. The publication provides extensive analysis of new high-perf ...

, June 2011) and engineering samples of 64-core Epiphany-IV (E64G401) were produced using 28 nm

GlobalFoundries GlobalFoundries Inc. is a multinational semiconductor contract manufacturing and design company located in the Cayman Islands and headquartered in Malta, New York. Created by the divestiture of the manufacturing arm of AMD in March 2009, the ...

process (800 MHz). The primary markets for the Epiphany multi-core architecture include: *

Smartphone A smartphone is a mobile phone with advanced computing capabilities. It typically has a touchscreen interface, allowing users to access a wide range of applications and services, such as web browsing, email, and social media, as well as multi ...

applications such as real-time facial recognition,

speech recognition Speech recognition is an interdisciplinary subfield of computer science and computational linguistics that develops methodologies and technologies that enable the recognition and translation of spoken language into text by computers. It is also ...

translation Translation is the communication of the semantics, meaning of a #Source and target languages, source-language text by means of an Dynamic and formal equivalence, equivalent #Source and target languages, target-language text. The English la ...

, and

augmented reality Augmented reality (AR), also known as mixed reality (MR), is a technology that overlays real-time 3D computer graphics, 3D-rendered computer graphics onto a portion of the real world through a display, such as a handheld device or head-mounted ...

. * Next generation

supercomputer A supercomputer is a type of computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second (FLOPS) instead of million instruc ...

s requiring drastically better energy efficiency to allow systems to scale to exaflop computing levels. *

Floating-point In computing, floating-point arithmetic (FP) is arithmetic on subsets of real numbers formed by a ''significand'' (a Sign (mathematics), signed sequence of a fixed number of digits in some Radix, base) multiplied by an integer power of that ba ...

acceleration in

embedded system An embedded system is a specialized computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system. It is e ...

s based on field-programmable gate array architectures.

Parallella project

In September 2012, Adapteva started project Parallella on

, which was marketed as "''A Supercomputer for everyone''." Architecture reference manuals for the platform were published as part of the campaign to attract attention to the project. The US$750,000 funding goal was reached in a month, with a minimum contribution of US$99 entitling backers to obtain one device; although the initial deadline was set for May 2013, the first single-board computers with 16-core Epiphany chip were finally shipped in December 2013. Size of board is planned to be .Rick Merritt
Adapteva Kickstarts Hundred-Dollar Supercomputer
// EETimes, September 27, 2012 The Kickstarter campaign raised US$898,921. Raising US$3 million goal was unsuccessful, so no 64-core version of Parallella will be mass-produced.Andrew Back
Introducing the $99 Linux Supercomputer
, Linux.com, January 24, 2013: "pledges of $99 or more being rewarded with at least one board with a 16-core device. ... The 16-core Epiphany chip delivers 26 GFLOPS of performance and with the entire Parallella computer consuming only 5 watts" Kickstarter users having donated more than US$750 will get "parallella-64" variant with 64-core coprocessor (made from initial prototype manufacturing with 50 chips yield per wafer).

Epiphany V

By 2016, the firm had taped out a 1024-core

64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit central processing units (CPU) and arithmetic logic units (ALU) are those that are based on processor registers, a ...

variant of their Epiphany architecture that featured: larger local stores (64 KB), 64-bit addressing,

double-precision floating-point Double-precision floating-point format (sometimes called FP64 or float64) is a floating-point number format, usually occupying 64 bits in computer memory; it represents a wide range of numeric values by using a floating radix point. Double prec ...

arithmetic or

SIMD Single instruction, multiple data (SIMD) is a type of parallel computer, parallel processing in Flynn's taxonomy. SIMD describes computers with multiple processing elements that perform the same operation on multiple data points simultaneousl ...

single-precision, and 64-bit integer instructions, implemented in the 16 nm process node. This design included instruction set enhancements aimed at deep-learning and

cryptography Cryptography, or cryptology (from "hidden, secret"; and ''graphein'', "to write", or ''-logy, -logia'', "study", respectively), is the practice and study of techniques for secure communication in the presence of Adversary (cryptography), ...

applications. In July 2017, Adapteva's founder became a

DARPA The Defense Advanced Research Projects Agency (DARPA) is a research and development agency of the United States Department of Defense responsible for the development of emerging technologies for use by the military. Originally known as the Adva ...

br>MTO
program manager and announced that the Epiphany V was "unlikely" to become available as a commercial product.

Performance

The 16-core Parallella achieves roughly 5.0 GFLOPS/W, and the 64-core Epiphany-IV made with 28 nm estimated as 50 GFLOPS/W (single-precision), and 32-board system based on them achieves 15 GFLOPS/W. For comparison, top GPUs from AMD and Nvidia reached 10 GFLOPS/W for single-precision in 2009–2011 timeframe.

References

External links

*
Parallella specifications
{{Single-board computer Computer companies of the United States Computer hardware companies Companies based in Lexington, Massachusetts American companies established in 2008 Semiconductor companies of the United States Reconfigurable computing Manycore processors