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The K5 is
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s first
x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel, based on the 8086 microprocessor and its 8-bit-external-bus variant, the 8088. Th ...
processor to be developed entirely in-house. Introduced in March 1996, its primary competition was Intel's
Pentium Pentium is a series of x86 architecture-compatible microprocessors produced by Intel from 1993 to 2023. The Pentium (original), original Pentium was Intel's fifth generation processor, succeeding the i486; Pentium was Intel's flagship proce ...
microprocessor A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...
. The K5 was an ambitious design, closer to a
Pentium Pro The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel and introduced on November 1, 1995. It implements the P6 (microarchitecture), P6 microarchitecture (sometimes termed i686), and was the first x86 Intel C ...
than a Pentium regarding technical solutions and internal architecture. However, the final product was closer to the Pentium regarding performance, although faster clock-for-clock compared to the Pentium.


Technical details

The K5 was based upon an internal highly parallel
RISC In electronics and computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a comp ...
processor architecture with an x86 decoding front-end. The K5 offered good x86 compatibility and the in-house-developed test suite proved invaluable on later projects. All models had 4.3 million
transistor A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch electrical signals and electric power, power. It is one of the basic building blocks of modern electronics. It is composed of semicondu ...
s, with five integer units that could process instructions out of order and one floating-point unit. The
branch target buffer In computer architecture, a branch target predictor is the part of a processor that predicts the target, i.e., the address of the instruction that is executed next, of a taken conditional branch or unconditional branch instruction before the ta ...
was four times the size of the Pentium's and
register renaming In computer architecture, register renaming is a technique that abstracts logical processor register, registers from physical registers. Every logical register has a set of physical registers associated with it. When a machine language instructio ...
helped overcome register dependencies. The chip's
speculative execution Speculative execution is an optimization (computer science), optimization technique where a computer system performs some task that may not be needed. Work is done before it is known whether it is actually needed, so as to prevent a delay that woul ...
of instructions reduced pipeline stalls. It had a 16 KB four-way set-associative instruction cache and an 8 KB data cache. The floating-point divide and square-root microcode were mechanically proven. The floating-point transcendental instructions were implemented in hardware and were faithful to true mathematical results for all operands.


Performance

The K5 project represented an early chance for AMD to take technical leadership from Intel. Although the chip addressed the right design concepts, the actual engineering implementation had its issues. The low clock rates were, in part, due to AMD's limitations as a "cutting edge" manufacturing company at the time, and in part due to the design itself, which had many levels of logic for the process technology of the day, hampering clock scaling. Additionally, while the K5's floating-point performance was regarded as superior to that of the Cyrix 6x86, it was slower than that of the Pentium, although offering more reliable transcendental function results. Because it was late to market and did not meet performance expectations, the K5 never gained the acceptance among large computer manufacturers that the earlier Am486 and later AMD K6 enjoyed.


Features


Models

There were two revisions of the K5 architecture, internally called the SSA/5 and the 5k86, both released with the K5 label. The original set of "SSA/5" CPUs had its branch prediction unit disabled and additional internal waitstates added; these issues were remedied with the "5k86", resulting in up to 30% better performance clock for clock. The "SSA/5" line ran from 75 to 100 MHz; the "5k86" line ran from 90 to 133 MHz. However, AMD used what it called a PR rating, or performance rating, to label the chips according to their suggested equivalence in integer performance to a Pentium of that clock speed. Thus, a 116 MHz chip from the second line was marketed as the "K5 PR166". Manufacturing delays caused the PR200's arrival to nearly align with the release of K6. Since AMD did not want the two chips competing, the K5-PR200 only arrived in small numbers.


SSA/5

* Sold as 5K86 P75 to P100, later as K5 PR75 to PR100 * 4.3 million transistors in 500 or 350 nm * L1-Cache: 8 + 16 KB (data + instructions) * Socket 5 and Socket 7 * VCore: 3.52 V * Front side bus: 50 (PR75), 60 (PR90), 66 MHz (PR100) * First release: March 27, 1996 * Clockrate: 75, 90, 100 MHz


5k86

* Sold as K5 PR120 to PR166; later PR200 * 4.3 million transistors in 350 nm * L1-Cache: 8 + 16 KB (data + instructions) * Socket 5 and Socket 7 * VCore: 3.52 V * Front side bus: 60 (PR120/150), 66 MHz * First release: October 7, 1996 * Clockrate: 90 (PR120), 100 (PR133), 105 (PR150), 116.6 (PR166), 133 MHz (PR200)


References


Further reading

* Gwennap, Linley (25 March 1996). "AMD Ships Pentium Competitor". ''
Microprocessor Report ''Microprocessor Report'' is a newsletter covering the microprocessor industry. The publication is accessible only to paying subscribers. To avoid bias, it does not take advertisements. The publication provides extensive analysis of new high-perf ...
''. * Slater, Michael (24 October 1994). "AMD's K5 Designed to Outrun Pentium". ''
Microprocessor Report ''Microprocessor Report'' is a newsletter covering the microprocessor industry. The publication is accessible only to paying subscribers. To avoid bias, it does not take advertisements. The publication provides extensive analysis of new high-perf ...
''. * Slater, Michael (8 May 1995). "AMD K5 Volume Slips into 1996". ''
Microprocessor Report ''Microprocessor Report'' is a newsletter covering the microprocessor industry. The publication is accessible only to paying subscribers. To avoid bias, it does not take advertisements. The publication provides extensive analysis of new high-perf ...
''.


External links


AMD: AMD-K5 Processor OverviewPictures of K5 chips at CPUShack.com

AMD K5 technical specifications
{{AMD processors K05 K05 X86 microarchitectures Computer-related introductions in 1996