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Delay-insensitive Minterm Synthesis
Within digital electronics, the DIMS (delay-insensitive minterm synthesis) systemD. E. Muller, “Asynchronous logics and application to information processing,” Proc. Symp. Application of Switching Theory in Space Technology, H. Aiken and W. F. Main, Ed. , pp. 289-297, 1963. is an asynchronous design methodology making the least possible timing assumptions. Assuming only the quasi-delay-insensitive delay model the generated designs need little if any timing hazard testing. The basis for DIMS is the use of two wires to represent each bit of data. This is known as a dual-rail data encoding. Parts of the system communicate using the early four-phase asynchronous protocol. The construction of DIMS logic gates comprises generating every possible minterm using a row of C-elements and then gathering the outputs of these using OR gate The OR gate is a digital logic gate that implements logical disjunction. The OR gate returns true if either or both of its inputs are true; otherwi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Digital Electronics
Digital electronics is a field of electronics involving the study of digital signals and the engineering of devices that use or produce them. This is in contrast to analog electronics and analog signals. Digital electronic circuits are usually made from large assemblies of logic gates, often packaged in integrated circuits. Complex devices may have simple electronic representations of Boolean logic functions. History The binary number system was refined by Gottfried Wilhelm Leibniz (published in 1705) and he also established that by using the binary system, the principles of arithmetic and logic could be joined. Digital logic as we know it was the brain-child of George Boole in the mid 19th century. In an 1886 letter, Charles Sanders Peirce described how logical operations could be carried out by electrical switching circuits.Peirce, C. S., "Letter, Peirce to A. Marquand", dated 1886, '' Writings of Charles S. Peirce'', v. 5, 1993, pp. 541–3. GooglPreview See Burks, Ar ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Quasi-delay-insensitive
In digital logic design, an asynchronous circuit is quasi delay-insensitive (QDI) when it operates correctly, independent of gate and wire delay with the weakest exception necessary to be turing-complete. Overview Pros * Robust to process variation, temperature fluctuation, circuit redesign, and FPGA remapping. * Natural event sequencing facilitates complex control circuitry. * Automatic clock gating and compute-dependent cycle time can save dynamic power and increase throughput by optimizing for average-case workload characteristics instead of worst-case. Cons * Delay insensitive encodings generally require twice as many wires for the same data. * Communication protocols and encodings generally require twice as many devices for the same functionality. Chips QDI circuits have been used to manufacture a large number of research chips, a small selection of which follows. * Caltech's asynchronous microprocessor * Tokyo University's TITAC and TITAC-2 processors Theory ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
C-element
In digital computing, the Muller C-element (C-gate, hysteresis flip-flop, coincident flip-flop, or two-hand safety circuit) is a small binary logic circuit widely used in design of asynchronous circuits and systems. It outputs 0 when all inputs are 0, it outputs 1 when all inputs are 1, and it retains its output state otherwise. It was specified formally in 1955 by David E. MullerD. E. MullerTheory of asynchronous circuits Report no. 66, Digital Computer Laboratory, University of Illinois at Urbana-Champaign, 1955. and first used in ILLIAC II computer. In terms of the theory of lattices, the C-element is a semimodular distributive circuit, whose operation in time is described by a Hasse diagram.D. E. Muller and W. S. Bartky"A theory of asynchronous circuits" Int. Symposium on the Switching Theory in Harvard University, pp. 204–243, 1959.I. Kimura,A comparison between two mathematical models of asynchronous circuits" Science Reports of the Tokyo Kyoiku Daigaku, Section A 10 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
OR Gate
The OR gate is a digital logic gate that implements logical disjunction. The OR gate returns true if either or both of its inputs are true; otherwise it returns false. The input and output states are normally represented by different voltage levels. Description The gate accepts two inputs. It outputs a 1 if either or both of these inputs are 1, or outputs a 0 only if both inputs are 0. The inputs and outputs are binary digits (" bits") which have two possible logical states. In addition to 1 and 0, these states may be called true and false, high and low, active and inactive, or other such pairs of symbols. Thus it performs logical disjunction (∨) from mathematical logic. The gate can be represented with the plus sign (+) because it can be used for logical addition. Equivalently, an OR gate finds the ''maximum'' between two binary digits, just as the AND gate finds the ''minimum''. Together with the AND gate and the NOT gate, the OR gate is one of three basic logic gat ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Asynchronous Latches
Asynchrony is the state of not being in synchronization. Asynchrony or asynchronous may refer to: Electronics and computing * Asynchrony (computer programming), the occurrence of events independent of the main program flow, and ways to deal with such events ** Async/await * Asynchronous system, a system having no global clock, instead operating under distributed control ** Asynchronous circuit, a sequential digital logic circuit not governed by a clock circuit or signal ** Asynchronous communication, transmission of data without the use of an external clock signal * Asynchronous cellular automaton, a mathematical model of discrete cells which update their state independently * Asynchronous operation, a sequence of operations executed out of time coincidence with any event Other uses * Asynchrony (game theory), when players in games update their strategies at different time intervals * Asynchronous learning, an educational method in which the teacher and student are separated in ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
