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PlayStation Technical Specifications
The PlayStation technical specifications describe the various components of the original PlayStation video game console. Central processing unit (CPU) LSI CoreWare CW33300-based core * MIPS R3000A-compatible 32-bit RISC CPU MIPS R3051 with 5 KB L1 cache, running at 33.8688 MHz. * The microprocessor was manufactured by LSI Logic Corp. with technology licensed from SGI. * Features: ** Initial feature size ( process node) was 0.5 micron (500 nm). ** 850k – 1M transistors ** Operating performance: 30 MIPS ** Bus bandwidth 132 MB/s ** One arithmetic/logic unit (ALU) ** One shifter * CPU cache RAM: ** 4 KB instruction cache ** 1 KB data cache configured as a scratchpad Geometry Transformation Engine (GTE) * Coprocessor that resides inside the main CPU processor, giving it additional vector math instructions used for 3D graphics, lighting, geometry, polygon and coordinate transformations GTE performs high-speed matrix multiplicati ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Next Generation (magazine)
''Next Generation'' was a US video game magazine that was published by Imagine Media (now Future US). It was affiliated to and shared content with the UK's '' Edge'' magazine. ''Next Generation'' ran from January 1995 until January 2002. It was published by Jonathan Simpson-Bint and edited by Neil West. Other editors included Chris Charla, Tom Russo, and Blake Fischer. ''Next Generation'' initially covered the 32-bit consoles including 3DO, Atari Jaguar, and the then-still unreleased Sony PlayStation and Sega Saturn. Unlike competitors '' GamePro'' and '' Electronic Gaming Monthly'', the magazine was directed towards a different readership by focusing on the industry itself rather than individual games. Publication history The magazine was first published by GP Publications up until May 1995 when the publisher rebranded as Imagine Media. In September 1999, ''Next Generation'' was redesigned, and its cover name shortened ''NextGen''. A year later, in September 2000, the ma ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Texture Mapping
Texture mapping is a term used in computer graphics to describe how 2D images are projected onto 3D models. The most common variant is the UV unwrap, which can be described as an inverse paper cutout, where the surfaces of a 3D model are cut apart so that it can be unfolded into a 2D coordinate space (UV Space). Semantic Texture mapping can both refer to the task of unwrapping a 3D model, the abstract that a 3D model has textures applied to it and the related algorithm of the 3D software. Texture map refers to a Raster graphics also called image, texture. If the texture stores a specific property it's also referred to as color map, roughness map, etc. The coordinate space which converts from the 3D space of a 3D model into a 2D space so that it can sample from the Texture map is called: UV Space, UV Coordinates, Texture Space. Algorithm A simplified explanation of how an algorithm could work to render an image: # For each pixel we trace the coordinates of the screen ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Polygon (computer Graphics)
Polygons are used in computer graphics to compose images that are three-dimensional in appearance, and are one of the most popular geometric building blocks in computer graphics. Polygons are built up of vertices, and are typically used as triangles. A model's polygons can be rendered and seen simply in a wire frame model, where the outlines of the polygons are seen, as opposed to having them be shaded. This is the reason for a polygon stage in computer animation. The ''polygon count'' refers to the number of polygons being rendered per frame. Beginning with the fifth generation of video game consoles, the use of polygons became more common, and with each succeeding generation, polygonal models became increasingly complex. Competing methods for rendering polygons that avoid seams * Point ** Floating Point ** Fixed-Point **Polygon **because of rounding, every scanline has its own direction in space and may show its front or back side to the viewer. *Fraction (mathematics) ** ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Fixed-point Arithmetic
In computing, fixed-point is a method of representing fractional (non-integer) numbers by storing a fixed number of digits of their fractional part. Dollar amounts, for example, are often stored with exactly two fractional digits, representing the cents (1/100 of dollar). More generally, the term may refer to representing fractional values as integer multiples of some fixed small unit, e.g. a fractional amount of hours as an integer multiple of ten-minute intervals. Fixed-point number representation is often contrasted to the more complicated and computationally demanding floating-point representation. In the fixed-point representation, the fraction is often expressed in the same number base as the integer part, but using negative powers of the base ''b''. The most common variants are decimal (base 10) and binary (base 2). The latter is commonly known also as binary scaling. Thus, if ''n'' fraction digits are stored, the value will always be an integer multiple of ' ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Million Instructions Per Second
Instructions per second (IPS) is a measure of a computer's processor speed. For complex instruction set computers (CISCs), different instructions take different amounts of time, so the value measured depends on the instruction mix; even for comparing processors in the same family the IPS measurement can be problematic. Many reported IPS values have represented "peak" execution rates on artificial instruction sequences with few branches and no cache contention, whereas realistic workloads typically lead to significantly lower IPS values. Memory hierarchy also greatly affects processor performance, an issue barely considered in IPS calculations. Because of these problems, synthetic benchmarks such as Dhrystone are now generally used to estimate computer performance in commonly used applications, and raw IPS has fallen into disuse. The term is commonly used in association with a metric prefix (k, M, G, T, P, or E) to form kilo instructions per second (kIPS), mega instructio ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
3D Computer Graphics
3D computer graphics, sometimes called Computer-generated imagery, CGI, 3D-CGI or three-dimensional Computer-generated imagery, computer graphics, are graphics that use a three-dimensional representation of geometric data (often Cartesian coordinate system#Cartesian coordinates in three dimensions, Cartesian) that is stored in the computer for the purposes of performing calculations and rendering digital images, usually 2D images but sometimes 3D images. The resulting images may be stored for viewing later (possibly as an Computer animation, animation) or displayed in Real-time computer graphics, real time. 3D computer graphics, contrary to what the name suggests, are most often displayed on two-dimensional displays. Unlike 3D film and similar techniques, the result is two-dimensional, without visual depth perception, depth. More often, 3D graphics are being displayed on 3D displays, like in virtual reality systems. 3D graphics stand in contrast to 2D computer graphics which t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Sony Interactive Entertainment
Sony Interactive Entertainment LLC (SIE) is an American video game and digital entertainment company that is a major subsidiary of Japanese conglomerate Sony, Sony Group Corporation. It primarily operates the PlayStation brand of video game consoles and products. It is also the world's largest company in the video game industry based on its equity investments. In 1993, Sony and Sony Music Entertainment Japan jointly established Sony Computer Entertainment Inc. (SCE) in Tokyo, which released the video game console PlayStation (console), PlayStation in Japan the following year and subsequently in the United States and Europe the year after. In 2010, Sony underwent a corporate split and established Sony Network Entertainment International (SNEI) in California, which provided gaming-related services through the PlayStation Network as well as other media through Sony Entertainment Network, including the sale of game titles and content on the PlayStation Store, as well as offering Pl ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Net Yaroze
The is a Game development kit, development kit for the PlayStation (console), PlayStation video game console. It was a promotion by Sony Computer Entertainment to computer programming hobbyists which launched in June 1996 in Japan and in 1997 in other countries. It was originally called Net Yarouze, but was changed to Net Yaroze in late 1996. ''Yarōze'' means "Let's do it together". Conceived by PlayStation creator Ken Kutaragi and priced at around $750 United States dollar, US, the Net Yaroze (DTL-H300x) package contained a special black-colored debugging PlayStation unit, a serial cable for connecting the console to a personal computer, and a CD containing PlayStation development tools.IGN UK, "Net Yaroze", The user has to provide a personal computer (an IBM PC compatible or Apple Macintosh, Macintosh; NEC PC-9801 was also supported in Japan) to write the computer code, compile it, and send the program to the PlayStation. The Net Yaroze was neither the first nor only officia ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Scratchpad Memory
Scratchpad memory (SPM), also known as scratchpad, scratchpad RAM or local store in computer terminology, is an internal memory, usually high-speed, used for temporary storage of calculations, data, and other work in progress. In reference to a microprocessor (or CPU), scratchpad refers to a special high-speed memory used to hold small items of data for rapid retrieval. It is similar to the usage and size of a scratchpad in life: a pad of paper for preliminary notes or sketches or writings, etc. When the scratchpad is a hidden portion of the main memory then it is sometimes referred to as ''bump storage''. In some systems it can be considered similar to the L1 cache in that it is the next closest memory to the ALU after the processor registers, with explicit instructions to move data to and from main memory, often using DMA-based data transfer. In contrast to a system that uses caches, a system with scratchpads is a system with non-uniform memory access (NUMA) latencies, be ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Kibibyte
The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit of memory in many computer architectures. To disambiguate arbitrarily sized bytes from the common 8-bit definition, network protocol documents such as the Internet Protocol () refer to an 8-bit byte as an octet. Those bits in an octet are usually counted with numbering from 0 to 7 or 7 to 0 depending on the bit endianness. The size of the byte has historically been hardware-dependent and no definitive standards existed that mandated the size. Sizes from 1 to 48 bits have been used. The six-bit character code was an often-used implementation in early encoding systems, and computers using six-bit and nine-bit bytes were common in the 1960s. These systems often had memory words of 12, 18, 24, 30, 36, 48, or 60 bits, corresponding to ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which stores copies of the data from frequently used main memory locations. Most CPUs have a hierarchy of multiple cache levels (L1, L2, often L3, and rarely even L4), with different instruction-specific and data-specific caches at level 1. The cache memory is typically implemented with static random-access memory (SRAM), in modern CPUs by far the largest part of them by chip area, but SRAM is not always used for all levels (of I- or D-cache), or even any level, sometimes some latter or all levels are implemented with eDRAM. Other types of caches exist (that are not counted towards the "cache size" of the most important caches mentioned above), such as the translation lookaside buffer (TLB) which is part of the memory management unit (M ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
