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List Of Intel Xeon Processors (P6-based)
Pentium II Xeon "Drake" (250 nm) * All models support: '' MMX'' * All models support quad-processor configurations Pentium III Xeon "Tanner" (250 nm) * Based on P6 microarchitecture * All models support: '' MMX, SSE'' * All models support quad-processor configurations * Die Die, as a verb, refers to death, the cessation of life. Die may also refer to: Games * Die, singular of dice, small throwable objects used for producing random numbers Manufacturing * Die (integrated circuit), a rectangular piece of a semicondu ... size: 123 mm² * Steppings: B0, C0 " Cascades" (180 nm) * All models support: '' MMX, SSE'' * Only Xeon 700 and 900 are capable of quad processor configurations * ALL models shipped in either 2.8v, 5v, or 12v voltage variants Notes References * * * * * {{refend Intel Xeon (P6) ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Drake (microprocessor)
Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus. Overview The ''Xeon'' brand has been mainta ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MMX (instruction Set)
MMX is a ''single instruction, multiple data'' ( SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". It developed out of a similar unit introduced on the Intel i860, and earlier the Intel i750 video pixel processor. MMX is a processor supplementary capability that is supported on IA-32 processors by Intel and other vendors . The New York Times described the initial push, including Super Bowl advertisements, as focused on "a new generation of glitzy multimedia products, including videophones and 3-D video games." MMX has subsequently been extended by several programs by Intel and others: 3DNow!, Streaming SIMD Extensions (SSE), and ongoing revisions of Advanced Vector Extensions (AVX). Overview Naming MMX is officially a meaningless initialism trademarked by Intel; unofficially, the initials have been variously explained as standin ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which stores copies of the data from frequently used main memory locations. Most CPUs have a hierarchy of multiple cache levels (L1, L2, often L3, and rarely even L4), with different instruction-specific and data-specific caches at level 1. The cache memory is typically implemented with static random-access memory (SRAM), in modern CPUs by far the largest part of them by chip area, but SRAM is not always used for all levels (of I- or D-cache), or even any level, sometimes some latter or all levels are implemented with eDRAM. Other types of caches exist (that are not counted towards the "cache size" of the most important caches mentioned above), such as the translation lookaside buffer (TLB) which is part of the memory management unit ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Front-side Bus
A front-side bus (FSB) is a computer communication interface (bus) that was often used in Intel-chip-based computers during the 1990s and 2000s. The EV6 bus served the same function for competing AMD CPUs. Both typically carry data between the central processing unit (CPU) and a memory controller hub, known as the northbridge. Depending on the implementation, some computers may also have a back-side bus that connects the CPU to the cache. This bus and the cache connected to it are faster than accessing the system memory (or RAM) via the front-side bus. The speed of the front side bus is often used as an important measure of the performance of a computer. The original front-side bus architecture has been replaced by HyperTransport, Intel QuickPath Interconnect or Direct Media Interface in modern volume CPUs. History The term came into use by Intel Corporation about the time the Pentium Pro and Pentium II products were announced, in the 1990s. "Front side" refers to the e ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Multiplier
In computing, the clock multiplier (or CPU multiplier or bus/core ratio) sets the ratio of an internal CPU clock rate to the externally supplied clock. A CPU with a 10x multiplier will thus see 10 internal cycles (produced by PLL-based frequency multiplier circuitry) for every external clock cycle. For example, a system with an external clock of 100 MHz and a 36x clock multiplier will have an internal CPU clock of 3.6 GHz. The external address and data buses of the CPU (often collectively termed front side bus (FSB) in PC contexts) also use the external clock as a fundamental timing base; however, they could also employ a (small) multiple of this base frequency (typically two or four) to transfer data faster. The internal frequency of microprocessors is usually based on FSB frequency. To calculate internal frequency the CPU multiplies bus frequency by a number called the clock multiplier. For calculation, the CPU uses actual bus frequency, and not effective bus frequ ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Core Voltage
The CPU core voltage (''VCORE'') is the power supply voltage supplied to the CPU (which is a digital circuit), GPU, or other device containing a processing core. The amount of power a CPU uses, and thus the amount of heat it dissipates, is the product of this voltage and the current it draws. In modern CPUs, which are CMOS circuits, the current is almost proportional to the clock speed, the CPU drawing almost no current between clock cycles. (See, however, subthreshold leakage.) Power saving and clock speed To conserve power and manage heat, many laptop and desktop processors have a power management feature that software (usually the operating system) can use to adjust the clock speed and core voltage dynamically. Often a voltage regulator module converts from 5V or 12 V or some other voltage to whatever CPU core voltage is required by the CPU. The trend is towards lower core voltages, which conserve power. This presents the CMOS designer with a challenge, because ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Thermal Design Power
The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often a CPU, GPU or system on a chip) that the cooling system in a computer is designed to dissipate under any workload. Some sources state that the peak power rating for a microprocessor is usually 1.5 times the TDP rating. Intel has introduced a new metric called ''scenario design power'' (SDP) for some Ivy Bridge Y-series processors. Calculation The ''average CPU power'' (ACP) is the power consumption of central processing units, especially server processors, under "average" daily usage as defined by Advanced Micro Devices (AMD) for use in its line of processors based on the K10 microarchitecture ( Opteron 8300 and 2300 series processors). Intel's thermal design power (TDP), used for Pentium and Core 2 processors, measures the energy consumption under high workload; it is numerically somewhat higher than the "average" AC ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPU Socket
In computer hardware, a CPU socket or CPU slot contains one or more mechanical components providing mechanical and electrical connections between a microprocessor and a printed circuit board (PCB). This allows for placing and replacing the central processing unit (CPU) without soldering. Common sockets have retention clips that apply a constant force, which must be overcome when a device is inserted. For chips with many pins, zero insertion force (ZIF) sockets are preferred. Common sockets include Pin Grid Array (PGA) or Land Grid Array (LGA). These designs apply a compression force once either a handle (PGA type) or a surface plate (LGA type) is put into place. This provides superior mechanical retention while avoiding the risk of bending pins when inserting the chip into the socket. Certain devices use Ball Grid Array (BGA) sockets, although these require soldering and are generally not considered user replaceable. CPU sockets are used on the motherboard in desktop and ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
United States Dollar
The United States dollar (symbol: $; code: USD; also abbreviated US$ or U.S. Dollar, to distinguish it from other dollar-denominated currencies; referred to as the dollar, U.S. dollar, American dollar, or colloquially buck) is the official currency of the United States and several other countries. The Coinage Act of 1792 introduced the U.S. dollar at par with the Spanish silver dollar, divided it into 100 cents, and authorized the minting of coins denominated in dollars and cents. U.S. banknotes are issued in the form of Federal Reserve Notes, popularly called greenbacks due to their predominantly green color. The monetary policy of the United States is conducted by the Federal Reserve System, which acts as the nation's central bank. The U.S. dollar was originally defined under a bimetallic standard of (0.7735 troy ounces) fine silver or, from 1837, fine gold, or $20.67 per troy ounce. The Gold Standard Act of 1900 linked the dollar solely to gold. From 1934, its ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Slot 2
Slot 2 refers to the physical and electrical specification for the 330-lead Single Edge Contact Cartridge (or edge-connector) used by Intel's Pentium II Xeon and Pentium III Xeon. When first introduced, Slot 1 Pentium IIs were intended to replace the Pentium and Pentium Pro processors in the home, desktop, and low-end symmetric multiprocessing (SMP) markets. The Pentium II Xeon, which was aimed at multiprocessor workstations and servers, was largely similar to the ordinary Pentium II, being based on the same P6 Deschutes core, differing by offering the choice of L2 cache capacity of 1024 or 2048 KB besides 512 KB,In the context to semiconductor memory such as cache, KB refers to 210 bytes and by operating it at the core frequency (the Pentium II used cheaper third-party SRAM chips, running at 50% of CPU speed, to reduce cost). Because the design of the 242-lead Slot 1 connector did not support the full-speed L2 cache of the Xeon, an extended 330-lead connector wa ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Tanner (microprocessor)
Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus. Overview The ''Xeon'' brand has been ma ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
P6 (microarchitecture)
The P6 microarchitecture is the sixth-generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is frequently referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M line of microprocessors. The successor to the Pentium M variant of the P6 microarchitecture is the Core microarchitecture which in turn is also derived from P6. P6 was used within Intel's mainstream offerings from the Pentium Pro to Pentium III, and was widely known for low power consumption, excellent integer performance, and relatively high instructions per cycle (IPC). The P6 line of processing cores was succeeded by the NetBurst (P68) architecture which appeared with the introduction of Pentium 4. The P6 core was the sixth generation Intel microprocessor in the x86 line. The first implementation of the P6 core was the Pentium Pro CPU in 1995, the immediate successor to ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
