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Skylake is the codename used by Intel for a processor
microarchitecture In computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as µarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular processor. A given ISA may be imp ...
that was launched in August 2015 succeeding the Broadwell microarchitecture. Skylake is a microarchitecture redesign using the same 14 nm manufacturing process technology as its predecessor, serving as a tock in Intel's tick–tock manufacturing and design model. According to Intel, the redesign brings greater CPU and
GPU A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...
performance and reduced power consumption. Skylake CPUs share their microarchitecture with Kaby Lake, Coffee Lake, Cannon Lake,
Whiskey Lake Whiskey Lake is Intel's codename for a family of third 14 nm generation Skylake low-power mobile processors. Intel announced Whiskey Lake on August 28, 2018. Changes * 14++ nm process, same as Coffee Lake * Increased turbo clocks (300 ...
, and
Comet Lake Comet Lake is Intel's codename for its 10th generation Core microprocessors. They are manufactured using Intel's third 14 nm Skylake process refinement, succeeding the Whiskey Lake U-series mobile processor and Coffee Lake desktop proce ...
CPUs. Skylake is the last Intel platform on which Windows earlier than
Windows 10 Windows 10 is a major release of Microsoft's Windows NT operating system. It is the direct successor to Windows 8.1, which was released nearly two years earlier. It was released to manufacturing on July 15, 2015, and later to retail on ...
will be officially supported by
Microsoft Microsoft Corporation is an American multinational technology corporation producing computer software, consumer electronics, personal computers, and related services headquartered at the Microsoft Redmond campus located in Redmond, Washi ...
, although enthusiast-created modifications exist that allow
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and earlier to continue to receive
Windows Update Windows Update is a Microsoft service for the Windows 9x and Windows NT families of operating system, which automates downloading and installing Microsoft Windows software updates over the Internet. The service delivers software updates for ...
s on later platforms. Some of the processors based on the Skylake microarchitecture are marketed as 6th-generation Core. Intel officially declared end of life and discontinued Skylake LGA 1151 CPUs on March 4, 2019.


Development history

Skylake's development, as with previous processors such as
Banias Banias or Banyas ( ar, بانياس الحولة; he, בניאס, label=Modern Hebrew; Judeo-Aramaic, Medieval Hebrew: פמייס, etc.; grc, Πανεάς) is a site in the Golan Heights near a natural spring, once associated with the Greek g ...
, Dothan, Conroe, Sandy Bridge, and Ivy Bridge, was primarily undertaken by Intel Israel at its engineering research center in Haifa, Israel. The final design was largely an evolution of Haswell, with minor improvements to performance and several power-saving features being added. A major priority of Skylake's design was to design a microarchitecture for envelopes as low as 4.5W to embed within
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and
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in addition to higher-power desktop computers and servers. In September 2014, Intel announced the Skylake microarchitecture at the
Intel Developer Forum The Intel Developer Forum (IDF) was a biannual gathering of technologists to discuss Intel products and products based on Intel products. The first IDF was held in 1997. To emphasize the importance of China, the Spring 2007 IDF was held in Beijin ...
in
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, and that volume shipments of Skylake CPUs were scheduled for the second half of 2015. The Skylake development platform was announced to be available in Q1 2015. During the announcement, Intel also demonstrated two computers with desktop and mobile Skylake prototypes: the first was a desktop
testbed A testbed (also spelled test bed) is a platform for conducting rigorous, transparent, and replicable testing of scientific theories, computational tools, and new technologies. The term is used across many disciplines to describe experimental res ...
system, running the latest version of 3DMark, while the second computer was a fully functional laptop, playing 4K video. An initial batch of Skylake CPU models (6600K and 6700K) was announced for immediate availability during the
Gamescom Gamescom (stylized as gamescom) is a trade fair for video games held annually at the Koelnmesse in Cologne, North Rhine-Westphalia, Germany. Since 2018, it has been organised by ''game – Verband der deutschen Games-Branche'' (English: Associ ...
on August 5, 2015, unusually soon after the release of its predecessor, Broadwell, which had suffered from launch delays. Intel acknowledged in 2014 that moving from 22 nm (Haswell) to 14 nm (Broadwell) had been its most difficult process to develop yet, causing Broadwell's planned launch to slip by several months; yet, the 14 nm production was back on track and in full production as of Q3 2014. Industry observers had initially believed that the issues affecting Broadwell would also cause Skylake to slip to 2016, but Intel was able to bring forward Skylake's release and shorten Broadwell's release cycle instead. As a result, the Broadwell architecture had an unusually short run.


Overclocking of unsupported processors

Officially Intel supported
overclocking In computing, overclocking is the practice of increasing the clock rate of a computer to exceed that certified by the manufacturer. Commonly, operating voltage is also increased to maintain a component's operational stability at accelerated sp ...
of only the K and X versions of Skylake processors. However, it was later discovered that other non-K chips could be overclocked by modifying the base clock value – a process made feasible by the base clock applying only to the CPU, RAM, and integrated graphics on Skylake. Through beta UEFI firmware updates, some motherboard vendors, such as ASRock (which prominently promoted it under the name Sky OC) allowed the base clock to be modified in this manner. When overclocking unsupported processors using these UEFI firmware updates, several issues arise: These issues are partly caused by the power management of the processor needing to be disabled for base clock overclocking to work. In February 2016, however, an ASRock firmware update removed the feature. On February 9, 2016, Intel announced that it would no longer allow such overclocking of non-K processors, and that it had issued a CPU
microcode In processor design, microcode (μcode) is a technique that interposes a layer of computer organization between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. Microcode is a la ...
update that removes the function. In April 2016, ASRock started selling motherboards that allow overclocking of unsupported CPUs using an external clock generator.


Operating system support

In January 2016, Microsoft announced that it would end support of
Windows 7 Windows 7 is a major release of the Windows NT operating system developed by Microsoft. It was Software release life cycle#Release to manufacturing (RTM), released to manufacturing on July 22, 2009, and became generally available on October 22, ...
and
Windows 8.1 Windows 8.1 is a release of the Windows NT operating system developed by Microsoft. It was released to manufacturing on August 27, 2013, and broadly released for retail sale on October 17, 2013, about a year after the retail release of its pre ...
on Skylake processors effective July 17, 2017; after this date, only the most critical updates for the two operating systems would be released for Skylake users if they have been judged not to affect the reliability of the OS on older hardware, and
Windows 10 Windows 10 is a major release of Microsoft's Windows NT operating system. It is the direct successor to Windows 8.1, which was released nearly two years earlier. It was released to manufacturing on July 15, 2015, and later to retail on ...
would be the only
Microsoft Windows Windows is a group of several proprietary graphical operating system families developed and marketed by Microsoft. Each family caters to a certain sector of the computing industry. For example, Windows NT for consumers, Windows Server for ...
platform officially supported on Skylake, as well as all future Intel CPU microarchitectures beginning with Skylake's successor Kaby Lake.
Terry Myerson Terry Myerson (born 1972 or 1973) is an American venture partner at Madrona Venture Group and an operating executive at The Carlyle Group. Myerson was previously an Executive Vice President at Microsoft, and head of its Windows and Devices Group. ...
stated that Microsoft had to make a large investment in order to reliably support Skylake on older versions of Windows, and that future generations of processors would require further investments. Microsoft also stated that due to the age of the platform, it would be challenging for newer hardware, firmware, and device driver combinations to properly run under Windows 7. On March 18, 2016, in response to criticism over the move, primarily from enterprise customers, Microsoft announced revisions to the support policy, changing the cutoff for support and non-critical updates to July 17, 2018 and stating that Skylake users would receive all critical security updates for Windows 7 and 8.1 through the end of extended support. In August 2016, citing "a strong partnership with our OEM partners and Intel", Microsoft stated that it would continue to fully support 7 and 8.1 on Skylake through the end of their respective lifecycles. In addition, an enthusiast-created
modification Modification may refer to: * Modifications of school work for students with special educational needs * Modifications (genetics), changes in appearance arising from changes in the environment * Posttranslational modifications, changes to prote ...
was released that disabled the
Windows Update Windows Update is a Microsoft service for the Windows 9x and Windows NT families of operating system, which automates downloading and installing Microsoft Windows software updates over the Internet. The service delivers software updates for ...
check and allowed Windows 8.1 and earlier to continue to be updated on this and later platforms. As of Linux kernel 4.10, Skylake mobile power management is supported with most Package C states supported seeing some use. Linux 4.11 enables Frame-Buffer Compression for the integrated graphics chipset by default, which lowers power consumption. Skylake is fully supported on
OpenBSD OpenBSD is a security-focused, free and open-source, Unix-like operating system based on the Berkeley Software Distribution (BSD). Theo de Raadt created OpenBSD in 1995 by forking NetBSD 1.0. According to the website, the OpenBSD project e ...
6.2 and later, including accelerated graphics. For
Windows 11 Windows 11 is the latest major release of Microsoft's Windows NT operating system, released in October 2021. It is a free upgrade to its predecessor, Windows 10 (2015), and is available for any Windows 10 devices that meet the new Windows 11 ...
, only the high-end Skylake-X processors are officially listed as compatible. All other Skylake processors are not officially supported due to security concerns. However, it is still possible to manually upgrade using an ISO image (as Windows 10 users on those processors won't be offered to upgrade to Windows 11 via Windows Update), or perform a clean installation as long as the system has Trusted Platform Module (TPM) 2.0 enabled, but the user must accept that they will not be entitled to receive updates, and that damage caused by using Windows 11 on an unsupported configuration are not covered by the manufacturer's warranty.


Features

Like its predecessor, Broadwell, Skylake is available in five variants, identified by the
suffix In linguistics, a suffix is an affix which is placed after the stem of a word. Common examples are case endings, which indicate the grammatical case of nouns, adjectives, and verb endings, which form the conjugation of verbs. Suffixes can carr ...
es S (''SKL-S''), X (''SKL-X''), H (''SKL-H''), U (''SKL-U''), and Y (''SKL-Y''). SKL-S and SKL-X contain overclockable K and X variants with unlocked multipliers. The H, U and Y variants are manufactured in
ball grid array A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be pu ...
(BGA) packaging, while the S and X variants are manufactured in
land grid array The land grid array (LGA) is a type of surface-mount packaging for integrated circuits (ICs) that is notable for having the pins on the socket (when a socket is used) rather than the integrated circuit. An LGA can be electrically connected to a ...
(LGA) packaging using a new socket,
LGA 1151 LGA 1151, also known as Socket H4, zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby Lake CPUs, ...
( LGA 2066 for Skylake X). Skylake is used in conjunction with Intel 100 Series chipsets, also known as ''Sunrise Point''. The major changes between the Haswell and Skylake architectures include the removal of the fully integrated voltage regulator (FIVR) introduced with Haswell. On the variants that will use a discrete Platform Controller Hub (PCH), Direct Media Interface (DMI) 2.0 is replaced by DMI 3.0, which allows speeds of up to 8  GT/s. Skylake's U and Y variants support one
DIMM A DIMM () (Dual In-line Memory Module), commonly called a RAM stick, comprises a series of dynamic random-access memory integrated circuits. These memory modules are mounted on a printed circuit board and designed for use in personal computers ...
slot per channel, while H and S variants support two DIMM slots per channel. Skylake's launch and sales lifespan occur at the same time as the ongoing
SDRAM Synchronous dynamic random-access memory (synchronous dynamic RAM or SDRAM) is any DRAM where the operation of its external pin interface is coordinated by an externally supplied clock signal. DRAM integrated circuits (ICs) produced from the ...
market transition, with
DDR3 SDRAM Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth (" double data rate") interface, and has been in use since 2007. It is the higher-spe ...
memory gradually being replaced by
DDR4 Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth (" double data rate") interface. Released to the market in 2014, it is a variant of dynamic ran ...
memory. Rather than working exclusively with DDR4, the Skylake microarchitecture remains backward compatible by interoperating with both types of memory. Accompanying the microarchitecture's support for both memory standards, a new SO-DIMM type capable of carrying either DDR3 or DDR4 memory chips, called
UniDIMM UniDIMM (short for Universal DIMM) is a specification for dual in-line memory modules (DIMMs), which are printed circuit boards (PCBs) designed to carry dynamic random-access memory (DRAM) chips. UniDIMMs can be populated with either DDR3 or ...
, was also announced. Skylake's few P variants have a reduced on-die graphics unit (12 execution units enabled instead of 24 execution units) over their direct counterparts; see the table below. In contrast, with Ivy Bridge CPUs the P suffix was used for CPUs with completely disabled on-die video chipset. Other enhancements include Thunderbolt 3.0, SATA Express, Iris Pro graphics with
Direct3D feature level Direct3D is a graphics application programming interface (API) for Microsoft Windows. Part of DirectX, Direct3D is used to render three-dimensional graphics in applications where performance is important, such as games. Direct3D uses hardware a ...
 12_1 with up to 128 MB of L4
eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivalen ...
cache on certain SKUs. The Skylake line of processors retires
VGA Video Graphics Array (VGA) is a video display controller and accompanying de facto graphics standard, first introduced with the IBM PS/2 line of computers in 1987, which became ubiquitous in the PC industry within three years. The term can now ...
support, while supporting up to five monitors connected via HDMI 1.4, DisplayPort 1.2 or Embedded DisplayPort (eDP) interfaces. HDMI 2.0 ( 4K@60 Hz) is only supported on motherboards equipped with Intel's Alpine Ridge Thunderbolt controller. The Skylake instruction set changes include Intel MPX (Memory Protection Extensions) and Intel SGX (Software Guard Extensions). Future Xeon variants will also have Advanced Vector Extensions 3.2 (AVX-512F). Skylake-based laptops were predicted to use wireless technology called Rezence for charging, and other wireless technologies for communication with peripherals. Many major PC vendors agreed to use this technology in Skylake-based laptops; however, no laptops were released with the technology as of 2019. The integrated GPU of Skylake's S variant supports on Windows
DirectX Microsoft DirectX is a collection of application programming interfaces (APIs) for handling tasks related to multimedia, especially game programming and video, on Microsoft platforms. Originally, the names of these APIs all began with "Direct" ...
 12 Feature Level 12_1,
OpenGL OpenGL (Open Graphics Library) is a cross-language, cross-platform application programming interface (API) for rendering 2D and 3D vector graphics. The API is typically used to interact with a graphics processing unit (GPU), to achieve hardwa ...
 4.6 with latest Windows 10 driver update (OpenGL 4.5 on Linux) and
OpenCL OpenCL (Open Computing Language) is a software framework, framework for writing programs that execute across heterogeneous computing, heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs), d ...
 3.0 standards. The Quick Sync video engine now includes support for VP9 (GPU accelerated decode only), VP8 and HEVC (hardware accelerated 8-bit encode/decode and GPU accelerated 10-bit decode), and supports for resolutions up to 40962048. Intel also released unlocked (capable of overclocking) mobile Skylake CPUs. Unlike previous generations, Skylake-based Xeon E3 no longer works with a desktop chipset that supports the same socket, and requires either the C232 or the C236 chipset to operate.


Known issues

Short loops with a specific combination of instruction use may cause unpredictable system behavior on CPUs with hyperthreading. A
microcode In processor design, microcode (μcode) is a technique that interposes a layer of computer organization between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. Microcode is a la ...
update was issued to fix the issue. Skylake is vulnerable to
Spectre Spectre, specter or the spectre may refer to: Religion and spirituality * Vision (spirituality) * Apparitional experience * Ghost Arts and entertainment Film and television * ''Spectre'' (1977 film), a made-for-television film produced and wri ...
attacks. In fact, it is more vulnerable than other processors because it uses indirect branch speculation not just on indirect branches but also when the return prediction stack underflows. The latency for the
spinlock In software engineering, a spinlock is a lock that causes a thread trying to acquire it to simply wait in a loop ("spin") while repeatedly checking whether the lock is available. Since the thread remains active but is not performing a useful task, ...
instruction has been increased dramatically (from the usual 10 cycles to 141 cycles in Skylake), which can cause performance issues with older programs or libraries using pause instructions. Intel documents the increased latency as a feature that improves power efficiency.


Architecture changes compared to Broadwell microarchitecture


CPU

* Improved front-end, deeper out-of-order buffers, improved
execution unit In computer engineering, an execution unit (E-unit or EU) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program. It may have its own internal control sequence unit (not ...
s, more execution units (third vector integer ALU(VALU)) for five ALUs in total, more load/store bandwidth, improved
hyper-threading Hyper-threading (officially called Hyper-Threading Technology or HT Technology and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multipl ...
(wider retirement), speedup of AES-GCM and AES-CBC by 17% and 33% accordingly. * Up to four cores as the default mainstream configuration and up to 18 cores for X-series * AVX-512: F, CD, VL, BW, and DQ for some future Xeon variants, but not Xeon E3 * Intel MPX (Memory Protection Extensions) * Intel SGX (Software Guard Extensions) * Intel Speed Shift *Larger
Re-order buffer A re-order buffer (ROB) is a hardware unit used in an extension to the Tomasulo algorithm to support out-of-order and speculative instruction execution. The extension forces instructions to be committed in-order. The buffer is a circular buffe ...
(224 entries, up from 192) *
L1 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
size unchanged at 32 KB instruction and 32 KB data cache per core. * L2 cache was changed from 8-way to 4-way set associative *Voltage regulator module ( FIVR) is moved back to the motherboard *Enhancements of Intel Processor Trace: fine grained timing through CYC packets (cycle-accurate mode) and support for IP (Instruction Pointer) address filtering. * 64 to 128 MB L4
eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivalen ...
cache on certain SKUs


GPU

* Skylake's integrated Gen9 GPU supports Direct3D 12 at the feature level 12_1 * Full fixed function HEVC Main/8bit encoding/decoding acceleration. Hybrid/Partial HEVC Main10/10bit decoding acceleration.
JPEG JPEG ( ) is a commonly used method of lossy compression for digital images, particularly for those images produced by digital photography. The degree of compression can be adjusted, allowing a selectable tradeoff between storage size and imag ...
encoding acceleration for resolutions up to 16,000×16,000 pixels. Partial VP9 encoding/decoding acceleration.


I/O

*
LGA 1151 LGA 1151, also known as Socket H4, zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby Lake CPUs, ...
socket for mainstream desktop processors and LGA 2066 socket for enthusiast gaming/workstation X-series processors * 100-series chipset ( Sunrise Point) * X-series uses X299-series chipset *
DMI 3.0 In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge and southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous Intel chipsets had us ...
(From DMI 2.0) * Support for both DDR3L SDRAM and
DDR4 SDRAM Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth (" double data rate") interface. Released to the market in 2014, it is a variant of dynamic r ...
in mainstream variants, using custom
UniDIMM UniDIMM (short for Universal DIMM) is a specification for dual in-line memory modules (DIMMs), which are printed circuit boards (PCBs) designed to carry dynamic random-access memory (DRAM) chips. UniDIMMs can be populated with either DDR3 or ...
SO-DIMM form factor with up to 64  GB of
RAM Ram, ram, or RAM may refer to: Animals * A male sheep * Ram cichlid, a freshwater tropical fish People * Ram (given name) * Ram (surname) * Ram (director) (Ramsubramaniam), an Indian Tamil film director * RAM (musician) (born 1974), Dutch * ...
on LGA 1151 variants. Usual
DDR3 Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed ...
memory is also supported by certain motherboard vendors even though Intel doesn't officially support it. * Support for 16
PCI Express PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common ...
3.0 lanes from CPU, 20
PCI Express PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common ...
3.0 lanes from PCH (LGA 1151), 44
PCI Express PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common ...
3.0 lanes for Skylake-X * Support for Thunderbolt 3 (Alpine Ridge)


Other

* Thermal design power (TDP) up to 95 W (LGA 1151); up to 165 W (LGA 2066) *
14 nm The 14 nm process refers to the MOSFET technology node that is the successor to the 22nm (or 20nm) node. The 14nm was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following 22nm was expec ...
manufacturing process


Configurations

Skylake processors are produced in five main families: Y, U, H, S, and X. Multiple configurations are available within each family:


List of Skylake processor models


Mainstream desktop processors

Common features of the mainstream desktop Skylake CPUs: *
DMI 3.0 In computing, Direct Media Interface (DMI) is Intel's proprietary link between the northbridge and southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous Intel chipsets had us ...
and PCIe 3.0 interfaces * Dual channel memory support in the following configurations: DDR3L-1600 1.35 V (32 GB maximum) or DDR4-2133 1.2 V (64 GB maximum). DDR3 is unofficially supported through some motherboard vendors * 16
PCI-E PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common m ...
3.0 lanes * The Core-branded processors support the AVX2 instruction set. The Celeron and Pentium-branded ones support only SSE4.1/4.2 * 350 MHz base graphics clock rate


High-end desktop processors (Skylake-X)

Common features of the high performance Skylake-X CPUs: * Quad channel memory support for DDR4-2400 (on the i7-7800X) or DDR4-2666 (on all other CPUs) up to 128 GB * 28 (for the i7-7800X and i7-7820X) to 44 (for all other CPUs)
PCI-E PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common m ...
3.0 lanes * In addition to the AVX2 instruction set, they also support the AVX-512 instructions * No built-in iGPU (integrated graphics processor) * Turbo Boost Max Technology 3.0 for up to 2/4 threads workloads for CPUs that have 8 cores and more (7820X, 7900X, 7920X, 7940X, 7960X, 7980XE, and all 9th generation chips) * A different cache hierarchy (when compared to client Skylake CPUs or previous architectures)


Xeon High-end desktop processors (Skylake-X)

* Is Xeon instead of Core * Uses C621 Chipset * Xeon W-3175X is the only Xeon with a multiplier unlocked for
overclocking In computing, overclocking is the practice of increasing the clock rate of a computer to exceed that certified by the manufacturer. Commonly, operating voltage is also increased to maintain a component's operational stability at accelerated sp ...


Mobile processors

See also Server, Mobile below for mobile workstation processors.


Workstation processors

* All models support: ''
MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...
, SSE,
SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE i ...
,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
SSSE3 Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitectu ...
, SSE4.1, SSE4.2, AVX,
AVX2 Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bri ...
, AVX-512, FMA3, MPX, Enhanced Intel
SpeedStep Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel microprocessors that allow the clock speed of the processor to be dyna ...
Technology (EIST),
Intel 64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mo ...
, XD bit (an
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...
implementation),
Intel VT-x x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
,
Intel VT-d x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...
, Turbo Boost (excluding W-2102 and W-2104),
Hyper-threading Hyper-threading (officially called Hyper-Threading Technology or HT Technology and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multipl ...
(excluding W-2102 and W-2104),
AES-NI An Advanced Encryption Standard instruction set is now integrated into many processors. The purpose of the instruction set is to improve the speed and security of applications performing encryption and decryption using Advanced Encryption Standard ...
, Intel TSX-NI, Smart Cache.'' * PCI Express lanes: 48 * Supports up to 8 DIMMs of DDR4 memory, maximum 512 GB.


Server processors

E3 series server chips all consist of System Bus 9 GT/s, max. memory bandwidth of 34.1 GB/s dual channel memory. Unlike its predecessor, the Skylake Xeon CPUs require C230 series (C232/C236) or C240 series (C242/C246) chipset to operate, with integrated graphics working only with C236 and C246 chipsets. Mobile counterparts uses CM230 and CM240 series chipsets.


Skylake-SP (14 nm) Scalable Performance

* Xeon Platinum supports up to 8 sockets. Xeon Gold supports up to 4 sockets. Xeon Silver and Bronze support up to 2 sockets. ** −M: 1536 GB RAM per socket instead of 768 GB RAM for ''non''−M SKUs ** −F: integrated OmniPath fabric ** −T: High thermal-case and extended reliability * Support for up to 12
DIMM A DIMM () (Dual In-line Memory Module), commonly called a RAM stick, comprises a series of dynamic random-access memory integrated circuits. These memory modules are mounted on a printed circuit board and designed for use in personal computers ...
s of
DDR4 Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth (" double data rate") interface. Released to the market in 2014, it is a variant of dynamic ran ...
memory per CPU socket. * Xeon Platinum, Gold 61XX, and Gold 5122 have two AVX-512 FMA units per core. Xeon Gold 51XX (except 5122), Silver, and Bronze have a single AVX-512 FMA unit per core.


Xeon Bronze and Silver (dual processor)

* Xeon Bronze 31XX has no HT or Turbo Boost support. * Xeon Bronze 31XX supports DDR4-2133 MHz RAM. Xeon Silver 41XX supports DDR4-2400 MHz RAM. * Xeon Bronze 31XX and Xeon Silver 41XX support two UPI links at 9.6 GT/s.


Xeon Gold (quad processor)

* Xeon Gold 51XX and F SKUs has two UPIs at 10.4 GT/s. Xeon Gold 61XX has three UPIs at 10.4 GT/s. * Xeon Gold 51XX support DDR4-2400 MHz RAM (except 5122). Xeon Gold 5122 and 61XX support DDR4-2666 MHz RAM. File:Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 DSCx1.jpg, Intel Skylake Xeon gold processor File:Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 DSCx3.jpg, Intel Skylake Xeon gold processor, delidded File:Intel@14nm@Skylake@Skylake-SP(XCC)@Xeon(ES)@QJW5 DSCx10@5x.jpg, Die shot


Xeon Platinum (octal processor)

* Xeon Platinum non-F SKUs have three UPIs at 10.4 GT/s. Xeon Platinum F-SKUs have two UPIs at 10.4 GT/s. * Xeon Platinum supports DDR4-2666 MHz RAM.


See also

* List of Intel CPU microarchitectures


References


External links

* * {{IntelProcessorRoadmap
Skylake microarchitecture Skylake is the codename used by Intel for a processor microarchitecture that was launched in August 2015 succeeding the Broadwell microarchitecture. Skylake is a microarchitecture redesign using the same 14 nm manufacturing process tech ...
Intel microarchitectures Transactional memory X86 microarchitectures