SSE3, Streaming SIMD Extensions 3, also known by its
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 ser ...
code name Prescott New Instructions (PNI), is the third iteration of the
SSE instruction set for the
IA-32
IA-32 (short for "Intel Architecture, 32-bit", commonly called i386) is the 32-bit version of the x86 instruction set architecture, designed by Intel and first implemented in the 80386 microprocessor in 1985. IA-32 is the first incarnatio ...
(x86) architecture. Intel introduced SSE3 in early 2004 with the
Prescott revision of their
Pentium 4
Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 2000 ...
CPU. In April 2005,
AMD introduced a subset of SSE3 in revision E (Venice and San Diego) of their
Athlon 64
The Athlon 64 is a ninth-generation, AMD64-architecture microprocessor produced by Advanced Micro Devices (AMD), released on September 23, 2003. It is the third processor to bear the name ''Athlon'', and the immediate successor to the Athlon XP. T ...
CPUs. The earlier
SIMD instruction sets on the
x86 platform, from oldest to newest, are
MMX MMX may refer to:
* 2010, in Roman numerals
Science and technology
* MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel
* MMX Mineração, a Brazilian mining company
* Martian Moons eXploration, a Japane ...
,
3DNow!
3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
(developed by AMD, but not supported by Intel processors),
SSE, and
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE i ...
.
SSE3 contains 13 new instructions over
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE i ...
.
Changes
The most notable change is the capability to work horizontally in a register, as opposed to the more or less strictly vertical operation of all previous SSE instructions. More specifically, instructions to add and subtract the multiple values stored within a single register have been added. These instructions can be used to speed up the implementation of a number of
DSP and
3D operations. There is also a new instruction to convert floating point values to integers without having to change the global rounding mode, thus avoiding costly
pipeline stalls. Finally, the extension adds LDDQU, an alternative misaligned integer vector load that has better performance on
NetBurst based platforms for loads that cross cacheline boundaries.
CPUs with SSE3
*
AMD:
**
Opteron (since Stepping E4)
**
Sempron (since Palermo. Stepping E3)
**
Athlon 64
The Athlon 64 is a ninth-generation, AMD64-architecture microprocessor produced by Advanced Micro Devices (AMD), released on September 23, 2003. It is the third processor to bear the name ''Athlon'', and the immediate successor to the Athlon XP. T ...
(since Venice Stepping E3 and San Diego Stepping E4)
**
Athlon 64 FX (since San Diego Stepping E4)
**
Athlon 64 X2
The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with anot ...
**
Phenom 64 X2
**
Turion family
**
K10 family
**
APU family (including without GPU)
**
FX Series
**
Zen family
*
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 ser ...
:
**
Celeron D
**
Celeron
Celeron is Intel's brand name for low-end IA-32 and x86-64 computer microprocessor models targeted at low-cost personal computers.
Celeron processors are compatible with IA-32 software. They typically offer less performance per clock speed co ...
(starting with Core microarchitecture)
**
Pentium 4
Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 2000 ...
(since Prescott)
**
Pentium D
Pentium D is a range of desktop 64-bit x86-64 processors based on the NetBurst microarchitecture, which is the dual-core variant of the Pentium 4 manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to ...
**
Pentium Extreme Edition (but NOT Pentium 4 Extreme Edition)
**
Pentium Dual-Core
**
Pentium (starting with Core microarchitecture)
**
Core
**
Xeon
Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same ar ...
(since Nocona)
**
Atom
Every atom is composed of a nucleus and one or more electrons bound to the nucleus. The nucleus is made of one or more protons and a number of neutrons. Only the most common variety of hydrogen has no neutrons.
Every solid, liquid, gas, a ...
*
VIA
Via or VIA may refer to the following:
Science and technology
* MOS Technology 6522, Versatile Interface Adapter
* ''Via'' (moth), a genus of moths in the family Noctuidae
* Via (electronics), a through-connection
* VIA Technologies, a Taiwa ...
/
Centaur
A centaur ( ; grc, κένταυρος, kéntauros; ), or occasionally hippocentaur, is a creature from Greek mythology with the upper body of a human and the lower body and legs of a horse.
Centaurs are thought of in many Greek myths as bein ...
:
**
C7
**
Nano
*
Transmeta Efficeon TM88xx (NOT Model Numbers TM86xx)
New instructions
Common instructions
Arithmetic
* ADDSUBPD — (''Add-Subtract-Packed-Double'')
** Input: ,
** Output:
* ADDSUBPS — (''Add-Subtract-Packed-Single'')
** Input: ,
** Output:
AOS ( Array Of Structures )
* HADDPD — (''Horizontal-Add-Packed-Double'')
** Input: ,
** Output:
* HADDPS (''Horizontal-Add-Packed-Single'')
** Input: ,
** Output:
* HSUBPD — (''Horizontal-Subtract-Packed-Double'')
** Input: ,
** Output:
* HSUBPS — (''Horizontal-Subtract-Packed-Single'')
** Input: ,
** Output:
* LDDQU — As stated above, this is an alternative misaligned integer vector load. It can be helpful for video compression tasks.
*
MOVDDUP, MOVSHDUP, MOVSLDUP — These are useful for complex numbers and wave calculation like sound.
* FISTTP — Like the older x87 FISTP instruction, but ignores the floating point control register's rounding mode settings and uses the "chop" (truncate) mode instead. Allows omission of the expensive loading and re-loading of the control register in languages such as C where float-to-int conversion requires truncate behaviour by standard.
Other instructions
* MONITOR, MWAIT - These optimize multi-threaded applications, giving processors with
Hyper-threading better performance.
External links
X-bit Labs
{{DEFAULTSORT:Sse3
X86 instructions
SIMD computing