PWRficient
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PWRficient is a
microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...
series by
P.A. Semi P. A. Semi (originally Palo Alto Semiconductor) was an American fabless semiconductor company founded in Santa Clara, California in 2003 by Daniel W. Dobberpuhl, who was previously the lead designer for the DEC Alpha 21064 and StrongARM process ...
where the PA6T-1682M was the only one that became an actual product. PWRficient processors comply with the
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A compu ...
Power ISA, and are designed for high performance and extreme power efficiency. The processors are highly modular and can be combined to multi-core
system-on-a-chip A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...
(SoC) designs, combining CPU, northbridge, and southbridge functionality on a single processor die.


Details

The PA6T is the first and only processor core from P.A. Semi, in two distinct product lines: 16xxM dual core and 13xxM/E single core. The PA6T lines differed in
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
size,
memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an int ...
s, communication functionality, and cryptography offloading features. P.A. Semi planned up to 16 cores. The PA6T is the first Power ISA core designed from scratch in the previous ten years outside the AIM alliance, which included IBM,
Motorola Motorola, Inc. () was an American multinational telecommunications company based in Schaumburg, Illinois, United States. After having lost $4.3 billion from 2007 to 2009, the company split into two independent public companies, Motorol ...
,
Freescale Freescale Semiconductor, Inc. was an American semiconductor manufacturer. It was created by the divestiture of the Semiconductor Products Sector of Motorola in 2004. Freescale focused their integrated circuit products on the automotive, embedd ...
, and
Apple Inc. Apple Inc. is an American multinational technology company headquartered in Cupertino, California, United States. Apple is the largest technology company by revenue (totaling in 2021) and, as of June 2022, is the world's biggest company ...
Since
Texas Instruments Texas Instruments Incorporated (TI) is an American technology company headquartered in Dallas, Texas, that designs and manufactures semiconductors and various integrated circuits, which it sells to electronics designers and manufacturers globa ...
was an investors in P.A. Semi, it was suggested that its fabrication plants would have manufactured the PWRficient processors. PWRficient processors were initially shipped to select customers in February 2007 and were released worldwide in Q4 2007. P.A. Semi was bought by
Apple Inc. Apple Inc. is an American multinational technology company headquartered in Cupertino, California, United States. Apple is the largest technology company by revenue (totaling in 2021) and, as of June 2022, is the world's biggest company ...
in April 2008, and closed development of PWRficient architecture processors. However, it will continue to manufacture, sell, and support these components for the foreseeable future due to an agreement with the
US Government The federal government of the United States (U.S. federal government or U.S. government) is the national government of the United States, a federal republic located primarily in North America, composed of 50 states, a city within a feder ...
for some military applications. Some components of the P.A. Semi PWRficient were later integrated into
Apple silicon Apple silicon is a series of system on a chip (SoC) and system in a package (SiP) processors designed by Apple Inc., mainly using the ARM architecture. It is the basis of most new Mac computers as well as iPhone, iPad, iPod Touch, Apple TV, ...
.


Implementation

PWRficient processors comprise three parts:


CPU

PA6T * Superscalar, out-of-order 32-bit/
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A compu ...
Power ISA processor core *Adheres to the Power ISA v.2.04 * Little endian or big endian operation *64/64 kB instruction and data L1 caches. 32 GB/s bandwidth. *Six
execution unit In computer engineering, an execution unit (E-unit or EU) is a part of the central processing unit (CPU) that performs the operations and calculations as instructed by the computer program. It may have its own internal control sequence unit (not ...
s including a
double precision Double-precision floating-point format (sometimes called FP64 or float64) is a floating-point number format, usually occupying 64 bits in computer memory; it represents a wide dynamic range of numeric values by using a floating radix point. Flo ...
FPU and Altivec unit *
Hypervisor A hypervisor (also known as a virtual machine monitor, VMM, or virtualizer) is a type of computer software, firmware or hardware that creates and runs virtual machines. A computer on which a hypervisor runs one or more virtual machines is called ...
and
virtualization In computing, virtualization or virtualisation (sometimes abbreviated v12n, a numeronym) is the act of creating a virtual (rather than actual) version of something at the same abstraction level, including virtual computer hardware platforms, stor ...
support *Maximum 7 W at 2 GHz *11 million transistors, 10 mm² large @ 65 nm.


Memory system

CONEXIUM * scalable cross-bar interconnect * 1–8 SMP cores * 1–2
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
s, 512 KB – 8 MB large. 16 GB/s bandwidth. * 1–4 1067 MHz DDR2
memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an int ...
s. 16 GB/s bandwidth. * 64 GB/s peak bandwidth *
MOESI In Roman literature of the early 1st century CE, the Moesi ( or ; grc, Μοισοί, ''Moisoí'' or Μυσοί, ''Mysoí''; lat, Moesi or ''Moesae'') appear as a Paleo-Balkan people who lived in the region around the River Timok to the south ...
coherency


I/O

ENVOI * Centralized DMA engine, 32 GB/s bandwidth * 16–64
SerDes {{Use American English, date = March 2019 A Serializer/Deserializer (SerDes) is a pair of functional blocks commonly used in high speed communications to compensate for limited input/output. These blocks convert data between serial data and paral ...
lanes *
XAUI 10 Gigabit Attachment Unit Interface (XAUI ) is a standard for extending the XGMII (10 Gigabit Media Independent Interface) between the MAC and PHY layer of 10 Gigabit Ethernet (10GbE) defined in Clause 47 of the IEEE 802.3 standard. The name i ...
* PCI Express *
SGMII The media-independent interface (MII) was originally defined as a standard interface to connect a Fast Ethernet (i.e., ) media access control (MAC) block to a PHY chip. The MII is standardized by IEEE 802.3u and connects different types of PHYs ...
* Offload engine for
cryptography Cryptography, or cryptology (from grc, , translit=kryptós "hidden, secret"; and ''graphein'', "to write", or ''-logia'', "study", respectively), is the practice and study of techniques for secure communication in the presence of adver ...
,
RAID Raid, RAID or Raids may refer to: Attack * Raid (military), a sudden attack behind the enemy's lines without the intention of holding ground * Corporate raid, a type of hostile takeover in business * Panty raid, a prankish raid by male college ...
, TCP


Users

*
Curtiss-Wright The Curtiss-Wright Corporation is a manufacturer and services provider headquartered in Davidson, North Carolina, with factories and operations in and outside the United States. Created in 1929 from the consolidation of Curtiss, Wright, and v ...
planned the 1682M processor for its
signal processing Signal processing is an electrical engineering subfield that focuses on analyzing, modifying and synthesizing ''signals'', such as sound, images, and scientific measurements. Signal processing techniques are used to optimize transmissions, ...
systems. *
Mercury Computer Systems Mercury Systems, Inc. is a technology company serving the aerospace and defense industry. It designs, develops and manufactures open architecture computer hardware and software products, including secure embedded processing modules and subsystem ...
planned the 1682M processor for its
signal In signal processing, a signal is a function that conveys information about a phenomenon. Any quantity that can vary over space or time can be used as a signal to share messages between observers. The '' IEEE Transactions on Signal Processing' ...
and image processing systems. *
NEC is a Japanese multinational information technology and electronics corporation, headquartered in Minato, Tokyo. The company was known as the Nippon Electric Company, Limited, before rebranding in 1983 as NEC. It provides IT and network soluti ...
planned the 1682M processor for its storage array systems. * AmigaOne X1000 has the 1682M processor as CPU.


References


External links

*
PA Semi attacks performance/WattFPF 2005: P.A. Semi's PA6T-1682M System on a Chip – Real World TechnologiesJudicious Clocking Subdues Power-Architecture Cooling Needs – Electronic Design
{{DEFAULTSORT:Pwrficient Power microprocessors