Espresso is the codename of the

32-bit In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32- bit units. Compared to smaller bit widths, 32-bit computers can perform large calculati ...

central processing unit A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, a ...

(CPU) used in

Nintendo is a Japanese multinational video game company headquartered in Kyoto, Japan. It develops video games and video game consoles. Nintendo was founded in 1889 as by craftsman Fusajiro Yamauchi and originally produced handmade playing cards ...

Wii U The Wii U ( ) is a home video game console developed by Nintendo as the successor to the Wii. Released in late 2012, it is the first eighth-generation video game console and competed with Microsoft's Xbox One and Sony's PlayStation 4. ...

video game console A video game console is an electronic device that outputs a video signal or image to display a video game that can be played with a game controller. These may be home consoles, which are generally placed in a permanent location connected to ...

. It was designed by IBM, and was produced using a 45 nm

silicon-on-insulator In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perfo ...

process. The Espresso chip resides together with a

GPU A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...

from AMD on an MCM manufactured by

Renesas is a Japanese semiconductor manufacturer headquartered in Tokyo, Japan, initially incorporated in 2002 as Renesas Technology, the consolidated entity of the semiconductor units of Hitachi and Mitsubishi excluding their dynamic random-access memo ...

. It was revealed at

E3 2011 The Electronic Entertainment Expo 2011 (E3 2011) was the 17th E3 held. The event took place at the Los Angeles Convention Center in Los Angeles, California. It began on June 7, 2011, and ended on June 9, 2011, with 46,800 total attendees. E3 ...

in June 2011 and released in November 2012.

Design

IBM and Nintendo have revealed that the Espresso processor is a

PowerPC PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple– IBM– ...

-based microprocessor with three cores on a single chip to reduce power consumption and increase speed. The CPU and the graphics processor are placed on a single substrate as a

multi-chip module A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or "pins") where multiple integrated circuits (ICs or "chips"), semiconductor dies and/or other discrete components are in ...

(MCM) to reduce complexity, increase the communication speed between the chips, further reduce power consumption and reduce cost and space required. The two chips were assembled to the complete MCM by Renesas in Japan. Espresso itself was manufactured by IBM in its 300 mm plant in

East Fishkill, New York East Fishkill is a town on the southern border of Dutchess County, New York, United States. The population was 29,707 at the 2020 census. The town was once the eastern portion of the town of Fishkill. Hudson Valley Research Park is located in th ...

, using 45 nm SOI-technology and embedded DRAM (eDRAM) for caches. While unverified by Nintendo, hackers, teardowns, and unofficial informants have since revealed more information about the Espresso, such as its name, size and speed. The microarchitecture seems to be quite similar to its predecessors the

Broadway Broadway may refer to: Theatre * Broadway Theatre (disambiguation) * Broadway theatre, theatrical productions in professional theatres near Broadway, Manhattan, New York City, U.S. ** Broadway (Manhattan), the street **Broadway Theatre (53rd Stree ...

and

Gekko ''Gekko'' is a genus of Southeast Asian geckos, commonly known as true geckos or calling geckos, in the family Gekkonidae. Although species such as '' Gekko gecko'' (tokay gecko) are very widespread and common, some species in the same genus h ...

, i.e.

PowerPC 750 The PowerPC 7xx is a family of third generation 32-bit PowerPC microprocessors designed and manufactured by IBM and Motorola (spun off as Freescale Semiconductor bought by NXP Semiconductors). This family is called the PowerPC G3 by its well-kno ...

based, but enhanced with larger and faster caches and

multiprocessor Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system. The term also refers to the ability of a system to support more than one processor or the ability to allocate tasks between them. There ar ...

support. Rumors that the Wii U CPU was derived from IBM's high-end

POWER7 POWER7 is a family of superscalar multi-core microprocessors based on the Power ISA 2.06 instruction set architecture released in 2010 that succeeded the POWER6 and POWER6+. POWER7 was developed by IBM at several sites including IBM's Roche ...

server processor proved false, as it would potentially increase the manufacturing and retail cost of the system, and require a larger form factor. Espresso shares some technology with POWER7, such as eDRAM and general instruction set similarities, but those are superficial similarities.

Specifications

Out-of-order execution In computer engineering, out-of-order execution (or more formally dynamic execution) is a paradigm used in most high-performance central processing units to make use of instruction cycles that would otherwise be wasted. In this paradigm, a proces ...

based cores * 45 nanometer process technology * IBM

silicon on insulator In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving per ...

(SOI) technology * Backward compatible with the

and

processors The following specifications ''have not been officially confirmed'' by either

or IBM. They have been obtained by

reverse engineering Reverse engineering (also known as backwards engineering or back engineering) is a process or method through which one attempts to understand through deductive reasoning how a previously made device, process, system, or piece of software accompli ...

by hacker Hector Martin, alias marcan. *

-based core architecture *Three cores at 1.243125

GHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose expression in terms of SI base units is s−1, meaning that one he ...

Symmetric multiprocessing Symmetric multiprocessing or shared-memory multiprocessing (SMP) involves a multiprocessor computer hardware and software architecture where two or more identical processors are connected to a single, shared main memory, have full access to all ...

with MESI/ MERSI support *Each core can output up to 4 instructions per clock using

superscalar A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...

parallelism. *32-bit integer unit *64-bit floating-point (or 2× 32-bit SIMD, often found under the denomination "paired singles") *A total of 3 MB of Level 2 cache in an unusual configuration.@marcan42, Twitter - 2013-01-30
/ref> **Core 0: 512 KB, core 1: 2 MB, core 2: 512 KB *4 stage pipeline IBM PowerPC 750CL Microprocessor Revision Level DD2.x Datasheet
/ref> *7 stage pipeline - FP *6 Execution Units per core (18 EUs total) *Die size: 4.74 mm × 5.85 mm = 27.73 mm²

Design

Specifications

References

Further reading