An arithmetic logic unit (ALU) is a combinational digital electronic circuit that performs arithmetic and bitwise operations on integer binary numbers. This is in contrast to a floatingpoint unit (FPU), which operates on floating point numbers. An ALU is a fundamental building block of many types of computing circuits, including the central processing unit (CPU) of computers, FPUs, and graphics processing units (GPUs). A single CPU, FPU or GPU may contain multiple ALUs. The inputs to an ALU are the data to be operated on, called operands, and a code indicating the operation to be performed; the ALU's output is the result of the performed operation. In many designs, the ALU also has status inputs or outputs, or both, which convey information about a previous operation or the current operation, respectively, between the ALU and external status registers. Contents 1 Signals 1.1 Data 1.2 Opcode 1.3 Status 1.3.1 Outputs 1.3.2 Inputs 2 Circuit operation 3 Functions 3.1
Arithmetic
4 Applications 4.1 Multipleprecision arithmetic 4.2 Complex operations 5 Implementation 6 History 7 See also 8 References 9 External links Signals[edit] An ALU has a variety of input and output nets, which are the electrical conductors used to convey digital signals between the ALU and external circuitry. When an ALU is operating, external circuits apply signals to the ALU inputs and, in response, the ALU produces and conveys signals to external circuitry via its outputs. Data[edit] A basic ALU has three parallel data buses consisting of two input operands (A and B) and a result output (Y). Each data bus is a group of signals that conveys one binary integer number. Typically, the A, B and Y bus widths (the number of signals comprising each bus) are identical and match the native word size of the external circuitry (e.g., the encapsulating CPU or other processor). Opcode[edit] The opcode input is a parallel bus that conveys to the ALU an operation selection code, which is an enumerated value that specifies the desired arithmetic or logic operation to be performed by the ALU. The opcode size (its bus width) determines the maximum number of different operations the ALU can perform; for example, a fourbit opcode can specify up to sixteen different ALU operations. Generally, an ALU opcode is not the same as a machine language opcode, though in some cases it may be directly encoded as a bit field within a machine language opcode. Status[edit] Outputs[edit] The status outputs are various individual signals that convey supplemental information about the result of the current ALU operation. Generalpurpose ALUs commonly have status signals such as: Carryout, which conveys the carry resulting from an addition operation, the borrow resulting from a subtraction operation, or the overflow bit resulting from a binary shift operation. Zero, which indicates all bits of Y are logic zero. Negative, which indicates the result of an arithmetic operation is negative. Overflow, which indicates the result of an arithmetic operation has exceeded the numeric range of Y. Parity, which indicates whether an even or odd number of bits in Y are logic one. At the end of each ALU operation, the status output signals are usually stored in external registers to make them available for future ALU operations (e.g., to implement multipleprecision arithmetic) or for controlling conditional branching. The collection of bit registers that store the status outputs are often treated as a single, multibit register, which is referred to as the "status register" or "condition code register". Inputs[edit] The status inputs allow additional information to be made available to the ALU when performing an operation. Typically, this is a single "carryin" bit that is the stored carryout from a previous ALU operation. Circuit operation[edit] The combinational logic circuitry of the
74181
An ALU is a combinational logic circuit, meaning that its outputs will
change asynchronously in response to input changes. In normal
operation, stable signals are applied to all of the ALU inputs and,
when enough time (known as the "propagation delay") has passed for the
signals to propagate through the ALU circuitry, the result of the ALU
operation appears at the ALU outputs. The external circuitry connected
to the ALU is responsible for ensuring the stability of ALU input
signals throughout the operation, and for allowing sufficient time for
the signals to propagate through the ALU before sampling the ALU
result.
In general, external circuitry controls an ALU by applying signals to
its inputs. Typically, the external circuitry employs sequential logic
to control the ALU operation, which is paced by a clock signal of a
sufficiently low frequency to ensure enough time for the ALU outputs
to settle under worstcase conditions.
For example, a CPU begins an ALU addition operation by routing
operands from their sources (which are usually registers) to the ALU's
operand inputs, while the control unit simultaneously applies a value
to the ALU's opcode input, configuring it to perform addition. At the
same time, the CPU also routes the ALU result output to a destination
register that will receive the sum. The ALU's input signals, which are
held stable until the next clock, are allowed to propagate through the
ALU and to the destination register while the CPU waits for the next
clock. When the next clock arrives, the destination register stores
the ALU result and, since the ALU operation has completed, the ALU
inputs may be set up for the next ALU operation.
Functions[edit]
A number of basic arithmetic and bitwise logic functions are commonly
supported by ALUs. Basic, general purpose ALUs typically include these
operations in their repertoires:
Arithmetic
Add: A and B are summed and the sum appears at Y and carryout. Add with carry: A, B and carryin are summed and the sum appears at Y and carryout. Subtract: B is subtracted from A (or vice versa) and the difference appears at Y and carryout. For this function, carryout is effectively a "borrow" indicator. This operation may also be used to compare the magnitudes of A and B; in such cases the Y output may be ignored by the processor, which is only interested in the status bits (particularly zero and negative) that result from the operation. Subtract with borrow: B is subtracted from A (or vice versa) with borrow (carryin) and the difference appears at Y and carryout (borrow out). Two's complement (negate): A (or B) is subtracted from zero and the difference appears at Y. Increment: A (or B) is increased by one and the resulting value appears at Y. Decrement: A (or B) is decreased by one and the resulting value appears at Y. Pass through: all bits of A (or B) appear unmodified at Y. This operation is typically used to determine the parity of the operand or whether it is zero or negative, or to load the operand into a processor register. Bitwise logical operations[edit] AND: the bitwise AND of A and B appears at Y. OR: the bitwise OR of A and B appears at Y. ExclusiveOR: the bitwise XOR of A and B appears at Y. Ones' complement: all bits of A (or B) are inverted and appear at Y. Bit shift operations[edit] Bit shift examples for an eightbit ALU Type Left shift Right shift Arithmetic Logical Rotate Rotate through carry ALU shift operations cause operand A (or B) to shift left or right (depending on the opcode) and the shifted operand appears at Y. Simple ALUs typically can shift the operand by only one bit position, whereas more complex ALUs employ barrel shifters that allow them to shift the operand by an arbitrary number of bits in one operation. In all singlebit shift operations, the bit shifted out of the operand appears on carryout; the value of the bit shifted into the operand depends on the type of shift.
Arithmetic
Applications[edit]
Multipleprecision arithmetic[edit]
In integer arithmetic computations, multipleprecision arithmetic is
an algorithm that operates on integers which are larger than the ALU
word size. To do this, the algorithm treats each operand as an ordered
collection of ALUsize fragments, arranged from mostsignificant (MS)
to leastsignificant (LS) or viceversa. For example, in the case of
an
8bit ALU, the 2
4bit
Calculation in a single clock: a very complex ALU that calculates a square root in one operation. Calculation pipeline: a group of simple ALUs that calculates a square root in stages, with intermediate results passing through ALUs arranged like a factory production line. This circuit can accept new operands before finishing the previous ones and produces results as fast as the very complex ALU, though the results are delayed by the sum of the propagation delays of the ALU stages. Iterative calculation: a simple ALU that calculates the square root through several steps under the direction of a control unit. The implementations above transition from fastest and most expensive to slowest and least costly. The square root is calculated in all cases, but processors with simple ALUs will take longer to perform the calculation because multiple ALU operations must be performed. Implementation[edit]
An ALU is usually implemented either as a standalone integrated
circuit (IC), such as the 74181, or as part of a more complex IC. In
the latter case, an ALU is typically instantiated by synthesizing it
from a description written in VHDL,
Verilog or some other hardware
description language. For example, the following
VHDL
entity alu is port (  the alu connections to external circuitry: A : in signed(7 downto 0);  operand A B : in signed(7 downto 0);  operand B OP : in unsigned(2 downto 0);  opcode Y : out signed(7 downto 0));  operation result end alu; architecture behavioral of alu is begin process(A, B, OP) begin case OP is  decode the opcode and perform the operation: when "000" => Y <= A + B;  add when "001" => Y <= A  B;  subtract when "010" => Y <= A  1;  decrement when "011" => Y <= A + 1;  increment when "100" => Y <= not A;  1's complement when "101" => Y <= A and B;  bitwise AND when "110" => Y <= A or B;  bitwise OR when "111" => Y <= A xor B;  bitwise XOR when others => NULL; end case; end process; end behavioral; History[edit]
Mathematician
John von Neumann
Information technology portal Adder (electronics)
Address generation unit
References[edit] ^ Philip Levis (November 8, 2004). "Jonathan von Neumann and EDVAC"
(PDF). cs.berkeley.edu. pp. 1, 3. Retrieved January 20,
2015.
^ Lee Boysel (20071012). "Making Your First Million (and other tips
for aspiring entrepreneurs)". U. Mich. EECS Presentation / ECE
Recordings. Archived from the original on 20121115.
^ Ken Shirriff. "The Z80 has a
4bit
Hwang, Enoch (2006). Digital Logic and
Microprocessor
External links[edit] Wikimedia Commons has media related to
Arithmetic
ALU and its Microoperations: Bitwise,
Arithmetic
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