|
Tolapai
Tolapai is the code name of Intel's embedded system on a chip (SoC) which combines a Pentium M ( Dothan) processor core, DDR2 memory controllers and input/output (I/O) controllers, and a ''QuickAssist'' integrated accelerator unit for security functions. Overview The Tolapai embedded processor has 148 million transistors on a 90 nm process technology, 1088-ball FCBGA with a 1.092mm pitch, and comes in a 37.5mm × 37.5mm package. It is also Intel's first integrated x86 processor, chipset and memory controller since 1994's 80386EX. Ars Technica, August 30, 2007 Intel EP80579 integrated processor for embedded computing: * CPU: |
Intel 80386EX
The Intel 80386EX (''386EX'') is a variant of the Intel 386 microprocessor designed for embedded systems. Introduced in August 1994 and was successful in the market being used aboard several orbiting satellites and microsatellites. Intel did not manufacture another integrated x86 processor until 2007, when it confirmed the Enhanced Pentium M-based Tolapai (''EP80579''). Characteristics * Introduced August 1994 * Variant of 80386SX intended for embedded systems * 26-bit memory addressing for up to 64 MiB of DRAM * 16-bit data bus, limiting performance but reducing system cost * Static core, i.e. may run as slowly (and thus, power efficiently) as desired, down to full halt * On-chip peripherals: ** clock and power management ** timers/counters ** watchdog timer ** serial I/O units (synchronous and asynchronous) and parallel I/O ** DMA ** RAM refresh ** JTAG test logic * Significantly more successful than the 80376 * Used aboard several orbiting satellites and microsatellites * Used ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Atom (system On Chip)
Atom is a system on a chip (SoC) platform designed for smartphones and tablet computers, launched by Intel in 2012. It is a continuation of the partnership announced by Intel and Google on September 13, 2011 to provide support for the Android operating system on Intel x86 processors. This range competes with existing SoCs developed for the smartphone and tablet market from companies such as Texas Instruments, Nvidia, Qualcomm and Samsung. Unlike these companies, which use ARM-based CPUs designed from the beginning to consume very low power, Intel has adapted the x86-based Intel Atom line of CPU developed for low power usage in netbooks, to even lower power usage. Since April 2012, several manufacturers have released Intel Atom-based tablets and phones as well as using the SoCs as a basis for other small form factor devices (e.g. mini PCs and stick PCs). In April 2016, Intel announced a major restructuring, including the cancellation of the SoFIA platform. It was report ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
16550 UART
The 16550 UART ( universal asynchronous receiver/transmitter) is an integrated circuit designed for implementing the interface for serial communications. The corrected -A version was released in 1987 by National Semiconductor. It is frequently used to implement the serial port for IBM PC compatible personal computers, where it is often connected to an RS-232 interface for modems, serial mice, printers, and similar peripherals. It was the first serial chip used in the IBM PS/2 line, which were introduced in 1987. The part was originally made by National Semiconductor. Similarly numbered devices, with varying levels of compatibility with the original National Semiconductor part, are made by other manufacturers. A UART function that is register-compatible with the 16550 is usually a feature of multifunction I/O cards for IBM PC-compatible computers and may be integrated on the motherboard of other compatible computers. Replacement of the factory-installed 8250 UART was a c ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Stepping Level
In integrated circuits, the stepping level or revision level is a version number that refers to the introduction or revision of one or more photolithographic photomasks within the set of photomasks that is used to pattern an integrated circuit. The term originated from the name of the equipment ( "steppers") that exposes the photoresist to light. Integrated circuits have two primary classes of mask sets: firstly, "base" layers that are used to build the structures, such as transistors, that comprise circuit logic and, secondly, "metal" layers that connect the circuit logic. Typically, when an integrated circuit manufacturer such as Intel or AMD produces a new stepping (i.e. a revision to the masks), it is because it has found bugs in the logic, has made improvements to the design that permit faster processing, has found a way to increase yield or improve the "bin splits" (i.e. create faster transistors and thus faster CPUs), has improved maneuverability to more easily identify ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Die (integrated Circuit)
A die, in the context of integrated circuits, is a small block of semiconducting material on which a given functional circuit is fabricated. Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon (EGS) or other semiconductor (such as GaAs) through processes such as photolithography. The wafer is cut ( diced) into many pieces, each containing one copy of the circuit. Each of these pieces is called a die. There are three commonly used plural forms: ''dice'', ''dies'' and ''die''. To simplify handling and integration onto a printed circuit board, most dies are packaged in various forms. Manufacturing process Most dies are composed of silicon and used for integrated circuits. The process begins with the production of monocrystalline silicon ingots. These ingots are then sliced into disks with a diameter of up to 300 mm. [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
NX Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is being increasingly used in conventional von Neumann architecture processors for security reasons. An operating system with support for the NX bit may mark certain areas of memory as non-executable. The processor will then refuse to execute any code residing in these areas of memory. The general technique, known as executable space protection, also called Write XOR Execute, is used to prevent certain types of malicious software from taking over computers by inserting their code into another program's data storage area and running their own code from within this section; one class of such attacks is known as the buffer overflow attack. The term NX bit originated with Advanced Micro Devices (AMD), as a marketing term. Intel markets the f ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
XD Bit
The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is being increasingly used in conventional von Neumann architecture processors for security reasons. An operating system with support for the NX bit may mark certain areas of memory as non-executable. The processor will then refuse to execute any code residing in these areas of memory. The general technique, known as executable space protection, also called Write XOR Execute, is used to prevent certain types of malicious software from taking over computers by inserting their code into another program's data storage area and running their own code from within this section; one class of such attacks is known as the buffer overflow attack. The term NX bit originated with Advanced Micro Devices (AMD), as a marketing term. Intel markets the featu ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU. In April 2005, AMD introduced a subset of SSE3 in revision E (Venice and San Diego) of their Athlon 64 CPUs. The earlier SIMD instruction sets on the x86 platform, from oldest to newest, are MMX, 3DNow! (developed by AMD, but not supported by Intel processors), SSE, and SSE2. SSE3 contains 13 new instructions over SSE2. Changes The most notable change is the capability to work horizontally in a register, as opposed to the more or less strictly vertical operation of all previous SSE instructions. More specifically, instructions to add and subtract the multiple values stored within a single register have been added. These instructions can be used to speed up the implementation of a number of DSP and 3D oper ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SSE2
SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE instruction set, and is intended to fully replace MMX. Intel extended SSE2 to create SSE3 in 2004. SSE2 added 144 new instructions to SSE, which has 70 instructions. Competing chip-maker AMD added support for SSE2 with the introduction of their Opteron and Athlon 64 ranges of AMD64 64-bit CPUs in 2003. Features Most of the SSE2 instructions implement the integer vector operations also found in MMX. Instead of the MMX registers they use the XMM registers, which are wider and allow for significant performance improvements in specialized applications. Another advantage of replacing MMX with SSE2 is avoiding the mode switching penalty for issuing x87 instructions present in MMX because it is sharing register space with the x87 FPU. The SSE2 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Streaming SIMD Extensions
In computing, Streaming SIMD Extensions (SSE) is a single instruction, multiple data ( SIMD) instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series of Central processing units (CPUs) shortly after the appearance of Advanced Micro Devices (AMD's) 3DNow!. SSE contains 70 new instructions (65 unique mnemonics using 70 encodings), most of which work on single precision floating-point data. SIMD instructions can greatly increase performance when exactly the same operations are to be performed on multiple data objects. Typical applications are digital signal processing and graphics processing. Intel's first IA-32 SIMD effort was the MMX instruction set. MMX had two main problems: it re-used existing x87 floating-point registers making the CPUs unable to work on both floating-point and SIMD data at the same time, and it only worked on integers. SSE floating-point instructions operate on a new independent register set ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MMX (instruction Set)
MMX is a ''single instruction, multiple data'' (SIMD) instruction set architecture designed by Intel, introduced on January 8, 1997 with its Pentium P5 (microarchitecture) based line of microprocessors, named "Pentium with MMX Technology". It developed out of a similar unit introduced on the Intel i860, and earlier the Intel i750 video pixel processor. MMX is a processor supplementary capability that is supported on IA-32 processors by Intel and other vendors . The New York Times described the initial push, including Super Bowl advertisements, as focused on "a new generation of glitzy multimedia products, including videophones and 3-D video games." MMX has subsequently been extended by several programs by Intel and others: 3DNow!, Streaming SIMD Extensions (SSE), and ongoing revisions of Advanced Vector Extensions (AVX). Overview Naming MMX is officially a meaningless initialism trademarked by Intel; unofficially, the initials have been variously explained as standing fo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Operating Temperature
An operating temperature is the allowable temperature range of the local ambient environment at which an electrical or mechanical device operates. The device will operate effectively within a specified temperature range which varies based on the device function and application context, and ranges from the minimum operating temperature to the maximum operating temperature (or peak operating temperature). Outside this range of safe operating temperatures the device may fail. It is one component of reliability engineering. Similarly, biological systems have a viable temperature range, which might be referred to as an "operating temperature". Ranges Most devices are manufactured in several temperature grades. Broadly accepted grades are: *Commercial: 0 ° to 70 °C *Industrial: −40 ° to 85 °C *Military: −55 ° to 125 °C Nevertheless, each manufacturer defines its own temperature grades so designers must pay close attention to actual datasheet spec ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
