tick–tock model
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Tick–tock was a production model adopted in 2007 by
chip Chromatin immunoprecipitation (ChIP) is a type of immunoprecipitation experimental technique used to investigate the interaction between proteins and DNA in the cell. It aims to determine whether specific proteins are associated with specific genom ...
manufacturer
Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...
. Under this model, every microarchitecture change (tock) was followed by a
die shrink The term die shrink (sometimes optical shrink or process shrink) refers to the scaling of metal-oxide-semiconductor (MOS) devices. The act of shrinking a die is to create a somewhat identical circuit using a more advanced fabrication process, ...
of the process technology (tick). It was replaced by the process–architecture–optimization model, which was announced in 2016 and is like a tick–tock cycle followed by an optimization phase. As a general engineering model, tick–tock is a model that refreshes one side of a binary system each release cycle.


History

Every "tick" represented a shrinking of the process technology of the previous microarchitecture (sometimes introducing new instructions, as with Broadwell, released in late 2014) and every "tock" designated a new microarchitecture. These occurred roughly every year to 18 months. In 2014, Intel created a " tock refresh" of a tock in the form of a smaller update to the microarchitecture not considered a new generation in and of itself. In March 2016, Intel announced in a Form 10-K report that it deprecated the tick–tock cycle in favor of a three-step process–architecture–optimization model, under which three generations of processors are produced under a single manufacturing process, with the third generation out of three focusing on optimization. The first optimization of the Skylake architecture was
Kaby Lake Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's ...
. Intel then announced a second optimization,
Coffee Lake Coffee Lake is Intel's codename for its eighth generation Core microprocessor family, announced on September 25, 2017. It is manufactured using Intel's second 14 nm process node refinement. Desktop Coffee Lake processors introduced i5 and ...
, making a total of four generations at 14 nm.


Roadmap


Pentium 4 / Core roadmap

, rowspan="1" , 2014-05-11,
2014-06-02 , colspan="5" rowspan="1" align="center" , rowspan="1" , Devil's Canyon , rowspan="1" align="center" , - style="background-color:#FEF6E7" , Tick (Process) , rowspan="8" , 14 nm , Broadwell , 5 , 4 , BDW , BDX , 2014-09-05 , Broadwell-EX , Broadwell-EP , Broadwell-DE , Broadwell-DT , Broadwell-E , Broadwell-DT , Broadwell-H
Broadwell-U
Broadwell-Y , - style="background-color:#FEFAF3" , Tock (Architecture) , rowspan="6" , Skylake , Skylake , 6 , 5 , SKL , SKX , 2015-08-05 , colspan="2" , Skylake-SP , Skylake-DE , Skylake-DT/H , Skylake-X , Skylake , Skylake-H
Skylake-U
Skylake-Y , - , rowspan="5" , Optimization
(Refresh)
,
Kaby Lake Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's ...
, 7 , 6 , KBL , rowspan="10" , 2017-01-03 , colspan="3" , Kaby Lake-DT/H
cores: 4 (4/8) , Kaby Lake-X ,
Kaby Lake Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's ...
, Kaby Lake-H
Kaby Lake-U
Kaby Lake-Y , - , Kaby Lake R , 8 , , KBL-R , 2017-08-21 , colspan="6" , Kaby Lake R , - ,
Coffee Lake Coffee Lake is Intel's codename for its eighth generation Core microprocessor family, announced on September 25, 2017. It is manufactured using Intel's second 14 nm process node refinement. Desktop Coffee Lake processors introduced i5 and ...
, 8, 9 , E-2xxx , CFL , 2017-10-05 , colspan="2" , Cascade Lake-SP
Cooper Lake (Q2'20) , Cascade Lake-AP , Coffee Lake-DT/H
cores: 6 (12) , Skylake-X Refresh , Coffee Lake-S
Coffee Lake-R , Coffee Lake-H
Coffee Lake-U
Coffee Lake-H Refresh , - , Whiskey Lake,
Amber Lake , 8 , rowspan="4" , WHL
AML , 2018-08-28 , colspan="6" , Whiskey Lake-U
Amber Lake-Y , - ,
Comet Lake Comet Lake is Intel's codename for its 10th generation Core microprocessors. They are manufactured using Intel's third 14 nm Skylake process refinement, succeeding the Whiskey Lake U-series mobile processor and Coffee Lake desktop process ...
, 10 , CML , 2019-08-21 , colspan="4" rowspan="1" align="center" , Comet Lake-W , Comet Lake-S , Comet Lake-H
Comet Lake-U , - style="background-color:#FEFAF3" , Architecture , Cypress Cove ,
Rocket Lake Rocket Lake is Intel's codename for its 11th generation Core microprocessors. Released on March 30, 2021, it is based on the new Cypress Cove microarchitecture, a variant of Sunny Cove (used by Intel's Ice Lake mobile processors) backported ...
, 11 , RKL , 2021-03-30 , colspan="5" , Rocket Lake-S , , - style="background-color:#FEF6E7" , style="background-color:#FEF6E7" , Process , rowspan="3" ,
10 nm The following are examples of orders of magnitude for different lengths. __TOC__ Overview Detailed list To help compare different orders of magnitude, the following list describes various lengths between 1.6 \times 10^ metres and 10^ ...
, style="background-color:#FEFAF3" , Palm Cove , Cannon Lake , 8 , CNL , 2018-05-16 , colspan="6" , Cannon Lake-U , - style="background-color:#FEFAF3" , Architecture , Sunny Cove , Ice Lake , 10 , 3 , ICL , 2019-08-01 , colspan="2" , Ice Lake-SP (1H21) , colspan="4" , Ice Lake-U
Ice Lake-Y , - , Optimization , style="background-color:#FEFAF3" , Willow Cove ,
Tiger Lake Tiger Lake is Intel's codename for the 11th generation Intel Core mobile processors based on the new Willow Cove Core microarchitecture, manufactured using Intel's third-generation 10 nm process node known as 10SF ("10 nm SuperFin"). Tig ...
, 11 , rowspan="2" , TGL , 2020-09-02 , colspan="6" , Tiger Lake-H35
Tiger Lake-UP3
Tiger Lake-UP4 , - style="background-color:#FEFAF3" , rowspan="2" , Architecture , style="background-color:#FEF6E7" rowspan="4" , Intel 7 , rowspan="2" ,
Golden Cove Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process no ...
,
Alder Lake Alder Lake is Intel's codename for the 12th generation of Intel Core processors based on a hybrid architecture utilizing Golden Cove performance cores and Gracemont efficient cores. It is fabricated using Intel's Intel 7 process, previousl ...
, 12 , ADL , 2021-11-04 , colspan="5" align="center" , Alder Lake-S , Alder Lake-H
Alder Lake-P
Alder Lake-U , - style="background-color:#FEFAF3" ,
Sapphire Rapids Sapphire Rapids is a codename for Intel's server (fourth generation Xeon Scalable) and workstation processors based on Intel 7. Sapphire Rapids was intended as part of the Eagle Stream server platform. In addition, it will be powering Aurora, a ...
, , 4 , , SPR , 2023-01-10 , colspan="2" , Sapphire Rapids-SP , colspan="3" , TBA , colspan="2" align="center" , - , rowspan="2" , Optimization , rowspan="6" , TBA ,
Raptor Lake Raptor Lake is Intel's codename for the 13th-generation of Intel Core processors based on a hybrid architecture, utilizing Raptor Cove performance cores and Gracemont efficient cores. Raptor Lake launched on October 20, 2022. Mobile versions ...
, 13 , , RPL , , 2022-10-20 , colspan="5" align="center" , colspan="2" , TBA , - ,
Emerald Rapids Emerald Rapids is a codename for Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, a ...
, , 5 , , EMR , 2023 , colspan="2" , Emerald Rapids-SP , colspan="3" , TBA , colspan="2" align="center" , - style="background-color:#FEF6E7" , Tick , Intel 4 , Meteor Lake , 14 , , MTL , , 2023 , colspan="5" align="center" , colspan="2" , TBA , - style="background-color:#FEFAF3" , Tick , style="background-color:#FEF6E7" , Intel 3 , Granite Rapids , , 6 , , GNR , 2024 , colspan="2" , Granite Rapids-SP , colspan="3" , TBA , colspan="2" align="center" , - style="background-color:#FEF6E7" , Tick , Intel 20A , Arrow Lake , 15 , , ARL , , 2024 , colspan="5" align="center" , colspan="2" , TBA , - style="background-color:#FEFAF3" , Tick , style="background-color:#FEF6E7" , Intel 18A , Lunar Lake , 16 , , LNL , , TBA , colspan="5" align="center" , colspan="2" , TBA , - ! rowspan="2" , Change
(step) ! rowspan="2" , Fabri­cation
process
! rowspan="2" , Micro-
architecture
! rowspan="2" , Code names
for step ! rowspan="2" , Intel
Generation
Desktop ! rowspan="2" , Intel
Generation
Xeon ! rowspan="2" , Intel Microcode
shortcut(s)
Desktop/WS ! rowspan="2" , Intel Microcode
shortcut(s)
Xeon/Server ! rowspan="2" , Release
date !8P/4P Server !4P/2P Server/WS !Embedded Xeon !1P Xeon !Enthusiast/WS !Desktop !Mobile , - ! colspan="7" , Processors


Atom roadmap

With
Silvermont Silvermont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. Silvermont forms the basis for a total of four SoC families: * ''Merrifield'' and ''Moorefield'' cons ...
Intel tried to start Tick-Tock in Atom architecture but problems with the 10 nm process did not allow to do this. In the table below instead of Tick-Tock steps Process-Architecture-Optimization are used. There is no official confirmation that Intel uses Process-Architecture-Optimization for Atom but it allows us to understand what changes happened in each generation. Note: There is further the
Xeon Phi Xeon Phi was a series of x86 manycore processors designed and made by Intel. It was intended for use in supercomputers, servers, and high-end workstations. Its architecture allowed use of standard programming languages and application program ...
. It has up to now undergone four development steps with a current top model that got the code name ''Knights Landing'' (shortcut: KNL; the predecessor code names all had the leading term ''Knights'' in their name) that is derived from the Silvermont architecture as used for the Intel Atom series but realized in a shrunk 14 nm (FinFET) technology.Intel veröffentlicht Xeon Phi mit bis zu 7 Teraflops
/ref> In 2018, Intel announced that Knights Landing and all further Xeon Phi CPU models were discontinued. However, Intel's Sierra Forest and subsequent Atom-based Xeon CPUs are likely a spiritual successor to Xeon Phi.


Both


See also

*
List of Intel CPU microarchitectures The following is a ''partial'' list of Intel CPU microarchitectures. The list is ''incomplete''. Additional details can be found in Intel's Tick–tock model and Process–architecture–optimization model. x86 microarchitectures 16-bit ; ...
* Transient execution CPU vulnerability


References


External links

*
Intel Tick–Tock Model at IDF 2009
Anandtech.com * {{DEFAULTSORT:Tick-tock model Intel x86 microprocessors Technology strategy Intel microarchitectures X86 microarchitectures fr:Intel#Stratégies tic-tac et processus-architecture-optimisation