JEDEC and JEITA/EIAJ standards
''Small outline'' actually refers to IC packaging standards from at least two different organizations: *General package characteristics
The SOIC package is shorter and narrower than DIP, the side-to-side pitch being 6 mm for an SOIC-14 (from lead tip to lead tip), and the body width being 3.9 mm. These dimensions differ depending on the SOIC in question, and there are several variants. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 in (1.27 mm).SOIC (JEDEC)
The picture below shows the general shape of a SOIC narrow package, with major dimensions. The values of these dimensions (in millimetres) for common SOICs is shown in the table.SOP (JEITA/EIAJ)
These are sometimes called "wide SOIC", as opposed to the narrower JEDEC MS-012, but they in turn are narrower than the JEDEC MS-013, which may also be called "wide SOIC". Next to the narrow SOIC package (commonly represented as SO''x''_N or SOIC''x''_N, where ''x'' is the number of pins), there's also the wide (or sometimes called ''extended'') version. This package is commonly represented as SO''x''_W or SOIC''x''_W. The difference is mainly related to the parameters WB and WL. As an example, the values WB and WL are given for an 8-pins wide (extended) SOIC package.mini-SOIC
Another SOIC variant, available only for 8-pin and 10-pin ICs, is the mini-SOIC, also called micro-SOIC. This case is much smaller, with a pitch of only 0.5 mm. See the table for the 10-pin model. An excellent overview of different semiconductor packages is provided bySmall-outline J-leaded package (SOJ)
Small-outline J-leaded package (SOJ) is a version of SOIC with J-type leads instead of gull-wing leads.Smaller form factors
After SOIC came a family of smaller form factors with pin spacings less than 1.27 mm: *Thin small outline package (TSOP) *Thin-shrink small outline package (TSSOP)Shrink small-outline package (SSOP)
Shrink small-outline package (SSOP) chips have "gull wing" leads protruding from the two long sides, and a lead spacing of 0.0256inches (0.65mm) or 0.025inches (0.635mm). 0.5mm lead spacing is less common, but not rare. The body size of a SOP was compressed and the lead pitch tightened to obtain a smaller version SOP. This yields an IC package with a significant reduction in the size compared to standard package. All IC assembly processes remain the same as with standard SOPs. Applications for a SSOP enable end-products (pagers, portable audio/video, disc drives, radio, RF devices/components, telecom) to be reduced in size and mass. Semiconductor families such as operational amplifiers, drivers, optoelectronics, controllers, logic, analog, memory, comparators and more using BiCMOS, CMOS or other silicon / GaAs technologies are well addressed by the SSOP product family.Thin small-outline package (TSOP)
A thin small-outline package (TSOP) is a rectangular, thin-bodied component. A Type I TSOP has legs protruding from the width portion of the package. A Type II TSOP has the legs protruding from the length portion of the package. The ICs on DRAM memory modules were usually TSOPs until they were replaced by ball grid array (BGA).Thin-shrink small-outline package (TSSOP)
A thin-shrink small-outline package (TSSOP) is a rectangular, thin-body component. A TSSOP's leg count can range from 8 to 64. TSSOPs are particularly suited for gate drivers, controllers, wireless / RF, op-amps,Exposed pad
The ''exposed pad'' (EP) variant of small outline packages can increase heat dissipation by as much as over a standard TSSOP, thereby expanding the margin of operating parameters. Additionally, the exposed pad can be connected to ground, thereby reducing loop inductance for high-frequency applications. The exposed pad should be soldered directly to the PCB to realize the thermal and electrical benefits.References
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