SHAKTI is an open-source initiative by the Reconfigurable Intelligent Systems Engineering (RISE) group at
Indian Institute of Technology, Madras
Indian Institute of Technology Madras (IIT Madras) is a public technical university located in Chennai, Tamil Nadu, India. As one of the Indian Institutes of Technology (IITs), it is recognized as an Institute of National Importance and ha ...
to develop the first indigenous Indian industrial-grade processor.
The aim of SHAKTI initiative includes building an opensource production-grade processor, complete System on Chips (SoCs), development boards and SHAKTI based software platform. The primary focus of the team is architecture research to develop SoCs, which is competitive with commercial offerings in the market concerning area, power and performance. All the source codes for SHAKTI are open-sourced under the
Modified BSD License
BSD licenses are a family of permissive free software licenses, imposing minimal restrictions on the use and distribution of covered software. This is in contrast to copyleft licenses, which have share-alike requirements. The original BSD lice ...
. The project was funded by
Ministry of Electronics and Information Technology
The Ministry of Electronics and Information Technology (MeitY) is an executive agency of the Union Government of the Republic of India. It was carved out of the Ministry of Communications and Information Technology on 19 July 2016 as a standalo ...
(MeITY), Government of India.
Processors
SHAKTIprocessors are based on the
RISC-V
RISC-V (pronounced "risk-five" where five refers to the number of generations of RISC architecture that were developed at the University of California, Berkeley since 1981) is an open standard instruction set architecture (ISA) based on establi ...
ISA. The processors are designed to be have either
22 nm FinFET
A fin field-effect transistor (FinFET) is a multigate device, a MOSFET (metal-oxide-semiconductor field-effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the channel, ...
or
180 nm
The 180 nm process refers to the level of MOSFET (CMOS) semiconductor process technology that was commercialized around the 1998–2000 timeframe by leading semiconductor companies, starting with TSMC and Fujitsu, then followed by Sony, ...
CMOS technology nodes depending on the manufacturing
foundry
A foundry is a factory that produces metal castings. Metals are cast into shapes by melting them into a liquid, pouring the metal into a mold, and removing the mold material after the metal has solidified as it cools. The most common metals ...
.
SHAKTI has envisioned a family of processors as part of its road-map, catering to different segments of the market. They have been broadly categorized into "Base Processors", "Multi-Core Processors" and "Experimental Processors".
The E and C-classes core are aimed at Internet of Things (IoT), Embedded and Desktop markets. The processor design is free of any royalty and is open-sourced under the Modified BSD License.
E-class and C-class core are both implemented in
Bluespec SystemVerilog (BSV) language.
The SHAKTI project aims to build 6 variants of processors based on the RISC-V ISA.
Base Classes Of Processors
E-class
The E-class are 32/64 bit
microcontroller
A microcontroller (MCU for ''microcontroller unit'', often also MC, UC, or μC) is a small computer on a single VLSI integrated circuit (IC) chip. A microcontroller contains one or more CPUs ( processor cores) along with memory and programma ...
s capable of supporting all extensions of the RISC-V ISA, aimed at low-power and low computer applications. The E-class is an in-order 3 stage pipeline having an operational frequency of less than 200 MHz on silicon. It is positioned against
ARM
In human anatomy, the arm refers to the upper limb in common usage, although academically the term specifically means the upper arm between the glenohumeral joint (shoulder joint) and the elbow joint. The distal part of the upper limb between t ...
’s M-class (
Cortex-M
The ARM Cortex-M is a group of 32-bit RISC ARM processor cores licensed by Arm Holdings. These cores are optimized for low-cost and energy-efficient integrated circuits, which have been embedded in tens of billions of consumer devices. Though ...
series) cores. It is capable of running real-time operating systems like
FreeRTOS
FreeRTOS is a real-time operating system kernel for embedded devices that has been ported to 35 microcontroller platforms. It is distributed under the MIT License.
History
The FreeRTOS kernel was originally developed by Richard Barry around 20 ...
,
Zephyr
In European tradition, a zephyr is a light wind or a west wind, named after Zephyrus, the Greek god or personification of the west wind.
Zephyr may also refer to:
Arts and media
Fiction Fiction media
* ''Zephyr'' (film), a 2010 Turki ...
and eChronos. Market segments of E-class processor support Smart-cards, IoT devices, motor controls and robotic platforms.
E-arty35T is a SoC built around E-class. The E-arty35T SoC is a single-chip 32-bit E-class microcontroller with 128kB RAM. It has 32 General Purpose Input Output (GPIO) pins (out of which upper 16 GPIO pins are dedicated to onboard LEDs and switches), a Platform Level Interrupt Controller (PLIC), a Counter, 2 Serial Peripheral (SPI), 2 Universal Asynchronous Receiver Transmitter (UART), 1 Inter-Integrated Circuit (I2C), 6 Pulse Width Modulator (PWM) and an inbuilt Xilinx
analog-to-digital converter
In electronics, an analog-to-digital converter (ADC, A/D, or A-to-D) is a system that converts an analog signal, such as a sound picked up by a microphone or light entering a digital camera, into a digital signal. An ADC may also provide ...
(X-ADC).
C-class
The C-class is a 64-bit controller class of processor, aimed at mid-range embedded application. The core is highly optimized, 6-stage in-order design with MMU support and the capability to run operating systems like Linux and Sel4. It is extremely configurable with the support of the standard RV64GC ISA extensions. It targets mid-range compute systems running over 200-800 MHz. It can also be customized up to 2 GHz. It is positioned against ARM's Cortex A35/A55. The application domain of this class ranges from embedded systems, motor-control, IoT, storage, industrial applications to low-cost high-performance Linux based applications such as networking, gateways etc.
C-arty100T is a SoC built around the C-class. The C-arty100T SoC is a single-chip 64-bit C-class microcontroller with 128MB DDR3 RAM, 16 General Purpose Input Output (GPIO) pins, a Platform Level Interrupt Controller (PLIC), a Counter, 1 Universal Asynchronous Receiver Transmitter (UART) and 1 Inter-Integrated Circuit (I2C). It is aimed at mid-range application workloads with a very low power consumption and has support for optional memory protection.
I-class
The I-class is a 64-bit processor which targets the compute, mobile, storage and networking platforms. Its features include
out-of-order execution,
multithreading, aggressive
branch prediction
In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else structure) will go before this is known definitively. The purpose of the branch predictor is to improve the flow i ...
,
non-blocking caches and
deep pipeline stages. The operational clock frequency of this processor is 1.5-2.5 GHz. The team is currently working on implementing atomics, Memory dependence prediction, Instruction Window/Scheduler optimizations, Implementation of some functional units, Performance analysis/projections, Optimizations to meet first-cut target frequency on 1 GHz on 22 nm processor.
Multicore Processors
M-class
A mobile class processor with a maximum of eight cores, the cores being a combination of C and I class cores. The M-class processors are aimed at general-purpose compute, low-end server and mobile applications. The operation frequency ranges up to 2.5 GHz. It supports large issue size, quad-threaded and optional NoC fabric. The M-class processors are optimized for various power and performance targets.
S-class
The S-Class is a 64-bit
superscalar
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...
,
multi-threaded
In computer science, a thread of execution is the smallest sequence of programmed instructions that can be managed independently by a scheduler, which is typically a part of the operating system. The implementation of threads and processes dif ...
variant aimed at Desktop and Enterprise server Application. Its supports 2-16 cores with a clock frequency of about 1.2–3 GHz.
H-class
The H-class is a 64-bit processor aimed at highly parallel enterprise, HPC and analytics applications. The cores can be a combination of C or I class, single-thread performance driving the core choice. The H-class has up to 128 cores with multiple accelerators per core.
Experimental Processors
These are experimental/research projects which focus on developing a high security and fault tolerant processor.
T-class
The T-class is aimed to provide additional hardware support for securing information from memory-based attacks. Its design focuses on a unified hardware framework for mitigating spatial and temporal memory attacks.
F-class
The F-class is a fault-tolerant version of the base class processor. Features include redundant compute blocks (like DMR and TMR), temporal redundancy modules to detect permanent faults, lock-step core configurations, fault localization circuits, ECC for critical memory blocks and redundant bus fabrics.
Tapeouts
Two C-class processors (codenamed ''RIMO'' and ''Risecreek'') and one E-class processor (''Moushik'') have been
taped-out so far.
RIMO
RIMO is the code name of the SHAKTI C-class based SoC that has been taped-out at
Semi-Conductor Laboratory
The Semi-Conductor Laboratory, Mohali (SCL) is a research institute under Ministry of Electronics and Information Technology (MeitY), Government of India (formerly under Department Of Space). Its aims include research and development in the field ...
(SCL) at Mohali using 180 nm process technology. The 144 sq.mm. chip has been tested to operate at a frequency of up to 70 MHz. The chip has been packaged on a 208-pin Ceramic Quad Flat Pack (CQFP).
Risecreek
CREEK is the code name of the SHAKTI C-class based SoC that has been taped-out at
Intel's Oregon fab using a 22nm FinFET process. The 16mm² chip has been tested to operate at a frequency of up to 350 MHz. The chip has been packaged on a 208-pin Ball Grid Array (BGA).
Moushik
Moushik is the code name of the SHAKTI E-class based SoC that has been taped-out at SCL using 180 nm process technology. It operates in frequency of 100 MHz and developed along with a motherboard called Ardonyx 1.0.
Features of RIMO and Risecreek
Some of the features of RIMO and Risecreek are as follows:
* In-order 5 stage 64-bit
microcontroller
A microcontroller (MCU for ''microcontroller unit'', often also MC, UC, or μC) is a small computer on a single VLSI integrated circuit (IC) chip. A microcontroller contains one or more CPUs ( processor cores) along with memory and programma ...
supporting the entire stable RISC-V ISA(RV64IMAFD).
* Compatible with privilege spec (v1.10) of RISC-V ISA and supports the sv39 virtualisation scheme.
* Includes a branch predictor with a Return-Address-Stack.
* Pipelined IEEE-754 compliant single and double-precision floating point units and Multi-channel
Direct Memory Access
Direct memory access (DMA) is a feature of computer systems and allows certain hardware subsystems to access main system memory independently of the central processing unit (CPU).
Without DMA, when the CPU is using programmed input/output, it is ...
(DMA) support.
* Peripherals like 2 x
I2C
I, or i, is the ninth letter and the third vowel letter of the Latin alphabet, used in the modern English alphabet, the alphabets of other western European languages and others worldwide. Its name in English is ''i'' (pronounced ), plural ...
, 2 x
UART
A universal asynchronous receiver-transmitter (UART ) is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. It sends data bits one by one, from the least signific ...
, 2 x
QSPI, a
Debugger
A debugger or debugging tool is a computer program used to test and debug other programs (the "target" program). The main use of a debugger is to run the target program under controlled conditions that permit the programmer to track its execut ...
, a 256KB tightly coupled memory, 32-bit GPIOs and an expansion bus that can be connected to an
FPGA
A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturinghence the term ''Field-programmability, field-programmable''. The FPGA configuration is generally specifi ...
.
Development boards
There are development boards for both E and C class of processors. The details on the board support for different classes of processors are given below.
E-arty35T
* E-arty35Tis a SoC based on SHAKTI E class
4
* E-arty35Tis supported on Artix 7 35T board.
* It has an abridged version of 32 bit E class. It includes I, M, A and C.
C-arty100T
* C-arty100Tis a SoC based on SHAKTI C class.
* C-arty100Tis supported on Artix 7 100T board.
* It has an abridged version of 64 bit C class. It includes I, M, A, F, D and C.
Commercial Support
Altair Engineering from July 2021, included E-Class processor in its embedded system firmware support portfolio for its global customers.
References
External links
* {{official website, 1=https://shakti.org.in/, 2= Shakti official website
Shakti official blogShakti Processor YouTube channel
Microcontrollers
Embedded microprocessors
32-bit microprocessors
64-bit microprocessors
Technology companies of India
Science and technology in India