Random logic is a semiconductor circuit design technique that translates high-level logic descriptions directly into hardware features such as AND and OR gates. The name derives from the fact that few easily discernible patterns are evident in the arrangement of features on the chip and in the interconnects between them. In
VLSI chips, random logic is often implemented with
standard cell
In semiconductor design, standard-cell methodology is a method of designing application-specific integrated circuits (ASICs) with mostly digital-logic features. Standard-cell methodology is an example of design abstraction, whereby a low-level ...
s and
gate array
A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a semiconductor device fabrication, prefabricated chip with components that are later interconnected into logic devices (e.g. NAN ...
s.
Random logic accounts for a large part of the circuit design in modern
microprocessor
A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...
s. Compared to
microcode
In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. It consists of a set of hardware-level instructions ...
, another popular design technique, random logic offers faster execution of processor
opcode
In computing, an opcode (abbreviated from operation code) is an enumerated value that specifies the operation to be performed. Opcodes are employed in hardware devices such as arithmetic logic units (ALUs), central processing units (CPUs), and ...
s, provided that processor speeds are faster than memory speeds. A disadvantage is that it is difficult to design random logic circuitry for processors with large and complex instruction sets. The hard-wired instruction logic occupies a large percentage of the chip's area, and it becomes difficult to lay out the logic so that related circuits are close to one another.
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References
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Instruction processing