Quartus Prime
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Quartus Prime is
programmable logic device A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates with fixed functions, the function of a PLD is undefined at the time of m ...
design software produced by
Altera Altera Corporation is a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015 before becoming independent once again in 2025 as a company focused on developm ...
; prior to Intel's separation of
Altera Altera Corporation is a manufacturer of programmable logic devices (PLDs) headquartered in San Jose, California. It was founded in 1983 and acquired by Intel in 2015 before becoming independent once again in 2025 as a company focused on developm ...
, the software was called Intel Quartus Prime, and prior to the acquisition of Altera by Intel, it was called Altera Quartus Prime, and earlier Altera Quartus II. Quartus Prime enables analysis and synthesis of HDL designs, which enables the developer to compile their designs, perform timing analysis, examine RTL diagrams, simulate a design's reaction to different stimuli, and configure the target device with the programmer. Quartus Prime includes an implementation of
VHDL VHDL (Very High Speed Integrated Circuit Program, VHSIC Hardware Description Language) is a hardware description language that can model the behavior and structure of Digital electronics, digital systems at multiple levels of abstraction, ran ...
and
Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits, with the highest level of abstraction being at the re ...
for hardware description, visual editing of logic circuits, and vector waveform simulation.


Features

Quartus Prime software features include: * Platform Designer (previously QSys, previously SOPC Builder), a tool that eliminates manual system integration tasks by automatically generating interconnect logic and creating a testbench to verify functionality. * SoCEDS, a set of development tools, utility programs, run-time software, and application examples to help you develop software for SoC FPGA embedded systems. * DSP Builder, a tool that creates a seamless bridge between the
MATLAB MATLAB (an abbreviation of "MATrix LABoratory") is a proprietary multi-paradigm programming language and numeric computing environment developed by MathWorks. MATLAB allows matrix manipulations, plotting of functions and data, implementat ...
/Simulink tool and Quartus Prime software, so FPGA designers have the algorithm development, simulation, and verification capabilities of MATLAB/Simulink system-level design tools * External memory interface toolkit, which identifies calibration issues and measures the margins for each DQS signal. * Generation of JAM/STAPL files for
JTAG JTAG (named after the Joint Test Action Group which codified it) is an industry standard for verifying designs of and testing printed circuit boards after manufacture. JTAG implements standards for on-chip instrumentation in electronic design ...
in-circuit device programmers.


Editions

Source:


Lite Edition

The Lite Edition is the free version of Quartus Prime Standard Edition and lacks certain features such as partial reconfiguration, design partitioning, register retiming and transceiver link analysis tools. This edition provides compilation and programming for a limited number of Altera FPGA devices, mainly the low-cost Cyclone
FPGA A field-programmable gate array (FPGA) is a type of configurable integrated circuit that can be repeatedly programmed after manufacturing. FPGAs are a subset of logic devices referred to as programmable logic devices (PLDs). They consist of a ...
s, as well as the MAX family of
CPLD A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementi ...
s. This enables small developers and educational institutions access to development tools without overhead from the cost of development software.


Standard Edition

The Standard Edition supports an extensive number of FPGA devices and is more full-featured than the Lite Edition, but requires a paid license.


Pro Edition

The Pro Edition is a newer version of the tools with the latest features and supporting recent Altera FPGA device families. Typically the Pro Edition requires a paid license, but for certain device families, Altera offers a free license.


See also

*
Xilinx ISE Xilinx ISE 100728 xilinx.com (short for ''Integrated Synthesis Environment'')Xilinx Vivado Vivado Design Suite is a software suite for synthesis and analysis of Hardware description language, hardware description language (HDL) designs, superseding Xilinx ISE with additional features for system on a chip development and high-level synt ...
*
ModelSim ModelSim is a multi-language environment by Siemens (previously developed by Mentor Graphics,) for simulation of hardware description languages such as VHDL, Verilog and SystemC, and includes a built-in C debugger.


References


External links


Intel Quartus Prime Software
{{Programmable Logic Electronic design automation software Proprietary software that uses Qt Software that uses Qt