Pole splitting

Pole splitting is a phenomenon exploited in some forms of frequency compensation used in an electronic amplifier. When a capacitor is introduced between the input and output sides of the amplifier with the intention of moving the pole lowest in frequency (usually an input pole) to lower frequencies, pole splitting causes the pole next in frequency (usually an output pole) to move to a higher frequency. This pole movement increases the stability of the amplifier and improves its step response at the cost of decreased speed.

Example of pole splitting

This example shows that introduction of the capacitor referred to as C_C in the amplifier of Figure 1 has two results: first it causes the lowest frequency pole of the amplifier to move still lower in frequency and second, it causes the higher pole to move higher in frequency. The amplifier of Figure 1 has a low frequency pole due to the added input resistance ''R_i'' and capacitance ''C_i'', with the time constant ''C_i'' ( ''R_A , , R_i'' ). This pole is moved down in frequency by the Miller effect. The amplifier is given a high frequency output pole by addition of the load resistance ''R_L'' and capacitance ''C_L'', with the time constant ''C_L'' ('' R_o , , R_L'' ). The upward movement of the high-frequency pole occurs because the Miller-amplified compensation capacitor ''C_C'' alters the frequency dependence of the output voltage divider.

The first objective, to show the lowest pole moves down in frequency, is established using the same approach as the Miller's theorem article. Following the procedure described in the article on Miller's theorem, the circuit of Figure 1 is transformed to that of Figure 2, which is electrically equivalent to Figure 1. Application of Kirchhoff's current law to the input side of Figure 2 determines the input voltage $\ v_i$ to the ideal op amp as a function of the applied signal voltage $\ v_a$, namely,

::$\frac = \frac \frac \ ,$

which exhibits a roll-off with frequency beginning at ''f₁'' where

::$\begin f_ & = \frac \\ & = \frac \ , \\ \end$

which introduces notation $\tau_1$ for the time constant of the lowest pole. This frequency is lower than the initial low frequency of the amplifier, which for ''C_C'' = 0 F is $\frac$.

Turning to the second objective, showing the higher pole moves still higher in frequency, it is necessary to look at the output side of the circuit, which contributes a second factor to the overall gain, and additional frequency dependence. The voltage $\ v_o$ is determined by the gain of the ideal op amp inside the amplifier as

::$\ v_o = A_v v_i \ .$

Using this relation and applying Kirchhoff's current law to the output side of the circuit determines the load voltage $v_$ as a function of the voltage $\ v_$ at the input to the ideal op amp as:

::$\frac = A_v \frac \,\!$$\sdot \frac \ .$

This expression is combined with the gain factor found earlier for the input side of the circuit to obtain the overall gain as

::$\frac = \frac \frac$

:::$= A_v \frac \sdot \frac \,\!$$\sdot \frac \,\!$$\sdot \frac \ .$

This gain formula appears to show a simple two-pole response with two time constants. (It also exhibits a zero in the numerator but, assuming the amplifier gain ''A_v'' is large, this zero is important only at frequencies too high to matter in this discussion, so the numerator can be approximated as unity.) However, although the amplifier does have a two-pole behavior, the two time-constants are more complicated than the above expression suggests because the Miller capacitance contains a buried frequency dependence that has no importance at low frequencies, but has considerable effect at high frequencies. That is, assuming the output ''R-C'' product, ''C_L'' ( ''R_o , , R_L'' ), corresponds to a frequency well above the low frequency pole, the accurate form of the Miller capacitance must be used, rather than the Miller approximation. According to the article on Miller effect, the Miller capacitance is given by

::$\begin C_M & = C_C \left( 1 - \frac \right) \\ & = C_C \left( 1 - A_v \frac \frac \right ) \ . \\ \end$

(For a positive Miller capacitance, ''A_v'' is negative.) Upon substitution of this result into the gain expression and collecting terms, the gain is rewritten as:

::$\frac = A_v \frac \frac \frac \ ,$

with ''D_ω'' given by a quadratic in ω, namely:

::$D_\,\!$ = R_L)\,\! \sdot \ R_i)\,\! $\ +j \omega C_C (R_A\, R_i)\,\!$ $\sdot \left( 1-A_v \frac \right) \,\!$ $\ +(j \omega) ^2 C_C C_L (R_A\, R_i) (R_O\, R_L) \ .$

Every quadratic has two factors, and this expression looks simpler if it is rewritten as

::$\ D_ =(1+j \omega _1 )(1+j \omega _2 )$

:::$= 1 + j \omega ( _1+_2) ) +(j \omega )^2 \tau_1 \tau_2 \ , \$

where $\tau_1$ and $\tau_2$ are combinations of the capacitances and resistances in the formula for ''D_ω''. They correspond to the time constants of the two poles of the amplifier. One or the other time constant is the longest; suppose $\tau_1$ is the longest time constant, corresponding to the lowest pole, and suppose $\tau_1$ >> $\tau_2$. (Good step response requires $\tau_1$ >> $\tau_2$. See Selection of C_C below.)

At low frequencies near the lowest pole of this amplifier, ordinarily the linear term in ω is more important than the quadratic term, so the low frequency behavior of ''D_ω'' is:

::
\begin
\ D_ & = 1+ j \omega R_i) +(C_L+C_C) (R_o\, R_L)\\
& = 1+j \omega ( \tau_1 + \tau_2) \approx 1 + j \omega \tau_1 \ , \ \\
\end

where now ''C_M'' is redefined using the Miller approximation as

::$C_M= C_C \left( 1 - A_v \frac \right) \ ,$

which is simply the previous Miller capacitance evaluated at low frequencies. On this basis $\tau_1$ is determined, provided $\tau_1$ >> $\tau_2$. Because ''C_M'' is large, the time constant $_1$ is much larger than its original value of ''C_i'' ( ''R_A , , R_i'' ).

At high frequencies the quadratic term becomes important. Assuming the above result for $\tau_1$ is valid, the second time constant, the position of the high frequency pole, is found from the quadratic term in ''D_ω'' as

::$\tau_2 = \frac \approx \frac \ .$

Substituting in this expression the quadratic coefficient corresponding to the product $\tau_1 \tau_2$ along with the estimate for $\tau_1$, an estimate for the position of the second pole is found:

::$\begin \tau_2 & = \frac \\ & \approx \frac (R_O\, R_L)\ , \\ \end$

and because ''C_M'' is large, it seems $\tau_2$ is reduced in size from its original value ''C_L'' ( ''R_o'' , , ''R_L'' ); that is, the higher pole has moved still higher in frequency because of ''C_C''.

In short, introduction of capacitor ''C_C'' moved the low pole lower and the high pole higher, so the term pole splitting seems a good description.

Selection of C_C

What value is a good choice for ''C_C''? For general purpose use, traditional design (often called ''dominant-pole'' or ''single-pole compensation'') requires the amplifier gain to drop at 20 dB/decade from the corner frequency down to 0 dB gain, or even lower.

With this design the amplifier is stable and has near-optimal step response even as a unity gain voltage buffer. A more aggressive technique is two-pole compensation.

The way to position ''f''₂ to obtain the design is shown in Figure 3. At the lowest pole ''f''₁, the Bode gain plot breaks slope to fall at 20 dB/decade. The aim is to maintain the 20 dB/decade slope all the way down to zero dB, and taking the ratio of the desired drop in gain (in dB) of 20 log₁₀ ''A_v'' to the required change in frequency (on a log frequency scale) of ( log₁₀ ''f''₂  − log₁₀ ''f''₁ ) = log₁₀ ( ''f''₂ / ''f''₁ ) the slope of the segment between ''f''₁ and ''f''₂ is:

::Slope per decade of frequency $=20 \frac \ ,$

which is 20 dB/decade provided ''f₂ = A_v f₁'' . If ''f₂'' is not this large, the second break in the Bode plot that occurs at the second pole interrupts the plot before the gain drops to 0 dB with consequent lower stability and degraded step response.

Figure 3 shows that to obtain the correct gain dependence on frequency, the second pole is at least a factor ''A_v'' higher in frequency than the first pole. The gain is reduced a bit by the voltage dividers at the input and output of the amplifier, so with corrections to ''A_v'' for the voltage dividers at input and output the pole-ratio condition for good step response becomes:

::$\frac \approx A_v \frac \sdot \frac \ ,$

Using the approximations for the time constants developed above,

::$\frac \approx \frac \approx A_v \frac \sdot \frac \ ,$

or

::$\frac \,\!$ $= A_v \frac \sdot \frac \ ,$

which provides a quadratic equation to determine an appropriate value for ''C_C''. Figure 4 shows an example using this equation. At low values of gain this example amplifier satisfies the pole-ratio condition without compensation (that is, in Figure 4 the compensation capacitor ''C_C'' is small at low gain), but as gain increases, a compensation capacitance rapidly becomes necessary (that is, in Figure 4 the compensation capacitor ''C_C'' increases rapidly with gain) because the necessary pole ratio increases with gain. For still larger gain, the necessary ''C_C'' drops with increasing gain because the Miller amplification of ''C_C'', which increases with gain (see the Miller equation ), allows a smaller value for ''C_C''.

To provide more safety margin for design uncertainties, often ''A_v'' is increased to two or three times ''A_v'' on the right side of this equation.A factor of two results in the ''maximally flat'' or Butterworth design for a two-pole amplifier. However, real amplifiers have more than two poles, and a factor greater than two often is necessary. See Sansen or Huijsing and article on step response.

Slew rate

The above is a small-signal analysis. However, when large signals are used, the need to charge and discharge the compensation capacitor adversely affects the amplifier slew rate; in particular, the response to an input ramp signal is limited by the need to charge ''C_C''.

See also

* Frequency compensation
* Miller effect
* Common source
* Bode plot
* Step response
* CMOS amplifier

References and notes

{{reflist

External links

* Bode Plots in the Circuit Theory Wikibook
* Bode Plots in the Control Systems Wikibook

Analog circuits
Electronic design