computer engineering Computer engineering (CoE or CpE) is a branch of electrical engineering and computer science that integrates several fields of computer science and electronic engineering required to develop computer hardware and software. Computer engineers ...

, the creation and development of the pipeline burst cache memory is an integral part in the development of the

superscalar A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...

architecture. It was introduced in the mid 1990s as a replacement for the Synchronous Burst Cache and the Asynchronous Cache and is still in use till date in

computer A computer is a machine that can be programmed to Execution (computing), carry out sequences of arithmetic or logical operations (computation) automatically. Modern digital electronic computers can perform generic sets of operations known as C ...

s. It basically increases the speed of the operation of the

cache Cache, caching, or caché may refer to: Places United States * Cache, Idaho, an unincorporated community * Cache, Illinois, an unincorporated community * Cache, Oklahoma, a city in Comanche County * Cache, Utah, Cache County, Utah * Cache County ...

memory by minimizing the wait states and hence maximizing the processor computing speed. Implementing the techniques of pipelining and bursting,

high performance computing High-performance computing (HPC) uses supercomputers and computer clusters to solve advanced computation problems. Overview HPC integrates systems administration (including network and security knowledge) and parallel programming into a multid ...

is assured. It works on the principle of parallelism, the very principle on which the development of

architecture rests. Pipeline burst cache can be found in

DRAM Dynamic random-access memory (dynamic RAM or DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell, usually consisting of a tiny capacitor and a transistor, both typically based on metal-oxid ...

controllers and chipset designs.

Introduction

In a processor-based system, the speed of the

processor Processor may refer to: Computing Hardware * Processor (computing) **Central processing unit (CPU), the hardware within a computer that executes a program *** Microprocessor, a central processing unit contained on a single integrated circuit (I ...

is always more than that of the

main memory Computer data storage is a technology consisting of computer components and recording media that are used to retain digital data. It is a core function and fundamental component of computers. The central processing unit (CPU) of a computer ...

. As a result, unnecessary wait-states are developed when instructions or data are being fetched from the main memory. This causes a hampering of the performance of the system. A cache memory is basically developed to increase the efficiency of the system and to maximise the utilisation of the entire computational speed of the

. The performance of the

is highly influenced by the methods employed to transfer data and instructions to and from the

. The less the time needed for the transfers the better the

performance. The Pipeline Burst Cache is basically a storage area for a

that is designed to be read from or written to in a pipelined succession of four data transfers. As the name suggests 'pipelining', the transfers after the first transfer happen before the first transfer has arrived at the

. It was developed as an alternative to asynchronous cache and synchronous burst cache. Pipeline Burst Cache gained widespread adoption starting with the release of the Intel 430FX chipset in 1995.

Principles of operation

The Pipeline Burst Cache is based on two principles of operation, namely:

Burst Mode

In this mode, the memory contents are prefetched before they are requested.
For a typical cache, each line is 32 bytes wide meaning that, transfers, to and from the cache, occur 32 bytes (256 bits) at a time. The data paths are however only 8 bytes wide. This means that four operations are needed for a single cache transfer. If not for burst mode each transfer would require a separate address to be provided. But since the transfers are to be done from consecutive memory locations there is no need to specify a different address after the first one. Using the technique of Bursting, the transfers of successive data bytes can take place without specifying the remaining addresses. This helps in speed improvement.

Pipelining Mode

In this mode, one memory value can be accessed in Cache at the same time that another memory value is accessed in

. The pipelining operation suggests that the transfer of data and instructions from or to the cache is divided into stages. Each stage is kept busy by one operation all the time. This is just like the concept used in an assembly line. This operation overcame the defects of sequential memory operations which involved a lot of time wastage and decrease in the

speed.

Operation

With the help of the above two principles of operations explained, a Pipeline Burst Cache is implemented. In this cache, transferring of data, from or to a new location, takes multiple cycles for initial transfer but subsequent transfers are done in a single cycle.

Trade-Off

The circuitry involved in this cache is very complex due to the simultaneous involvement of pipelining and burst mode. Hence, more time is required initially to set up the "pipeline".

References

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External links

What is pipeline burst cache?

Process (computing)