Flat no-leads packages such as quad-flat no-leads (QFN''

and dual-flat no-leads (DFN) physically and electrically connect

integrated circuit An integrated circuit (IC), also known as a microchip or simply chip, is a set of electronic circuits, consisting of various electronic components (such as transistors, resistors, and capacitors) and their interconnections. These components a ...

s to

printed circuit board A printed circuit board (PCB), also called printed wiring board (PWB), is a Lamination, laminated sandwich structure of electrical conduction, conductive and Insulator (electricity), insulating layers, each with a pattern of traces, planes ...

s. Flat no-leads, also known as micro leadframe (MLF) and SON (small-outline no leads), is a

surface-mount technology Surface-mount technology (SMT), originally called planar mounting, is a method in which the electrical components are mounted directly onto the surface of a printed circuit board (PCB). An electrical component mounted in this manner is referred ...

, one of several package technologies that connect ICs to the ''surfaces'' of

PCB PCB may refer to: Science and technology * Polychlorinated biphenyl, an organic chlorine compound, now recognized as an environmental toxin and classified as a persistent organic pollutant * Printed circuit board, a board used in electronics * P ...

s without through-holes. Flat no-lead is a near chip scale plastic encapsulated package made with a planar

copper Copper is a chemical element; it has symbol Cu (from Latin ) and atomic number 29. It is a soft, malleable, and ductile metal with very high thermal and electrical conductivity. A freshly exposed surface of pure copper has a pinkish-orang ...

lead frame substrate. Perimeter lands on the package bottom provide electrical connections to the

. Flat no-lead packages usually, but not always, include an exposed

thermally conductive pad In computing and electronics, thermal pads (also called thermally conductive pad or thermal interface pad) are pre-formed rectangles of solid material (often paraffin wax or silicone based) commonly found on the underside of heatsinks to aid the ...

to improve heat transfer out of the IC (into the PCB). Heat transfer can be further facilitated by metal vias in the thermal pad. The QFN package is similar to the quad-flat package (QFP), and a

ball grid array A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be pu ...

(BGA).

Flat no-lead cross-section

The figure shows the cross section of a flat no-lead package with a

lead frame A lead frame (pronounced ) is a metal structure inside a chip package that carries signals from the die to the outside, used in DIP, QFP and other packages where connections to the chip are made on its edges. The lead frame consists of a centr ...

and

wire bonding Wire bonding is a method of making interconnections between an integrated circuit (IC) or other semiconductor device and its packaging during semiconductor device fabrication. Wire bonding can also be used to connect an IC to other electronics ...

. There are two types of body designs, ''punch singulation'' and ''saw singulation''. Saw singulation cuts a large set of packages in parts. In punch singulation, a single package is moulded into shape. The cross section shows a saw-singulated body with an attached thermal head pad. The lead frame is made of copper alloy and a thermally conductive adhesive is used for attaching the silicon die to the thermal pad. The silicon die is electrically connected to the lead frame by 1–2

thou The word ''thou'' () is a second-person singular pronoun in English. It is now largely archaic, having been replaced in most contexts by the word '' you'', although it remains in use in parts of Northern England and in Scots (). ''Thou' ...

diameter gold wires. The pads of a saw-singulated package can either be completely under the package, or they can fold around the edge of the package.

Different types

Two types of QFN packages are common: air-cavity QFNs, with an air cavity designed into the package, and plastic-moulded QFNs with air in the package minimized. Less-expensive plastic-moulded QFNs are usually limited to applications up to ~2–3 GHz. It is usually composed of just 2 parts, a plastic compound and copper lead frame, and does not come with a lid. In contrast, the air-cavity QFN is usually made up of three parts; a copper leadframe, plastic-moulded body (open, and not sealed), and either a ceramic or plastic lid. It is usually more expensive due to its construction, and can be used for microwave applications up to 20–25 GHz. QFN packages can have a single row of contacts or a double row of contacts.

Advantages

This package offers a variety of benefits including reduced lead inductance, a small sized "near chip scale" footprint, thin profile and low weight. It also uses perimeter I/O pads to ease PCB trace routing, and the exposed copper die-pad technology offers good thermal and electrical performance. These features make the QFN an ideal choice for many new applications where size, weight, thermal and electrical performance are important.

Design, manufacturing, and reliability challenges

Improved packaging technologies and component miniaturization can often lead to new or unexpected design, manufacturing, and reliability issues. This has been the case with QFN packages, especially when it comes to adoption by new non-consumer electronic OEMs.

Design and manufacturing

Some key QFN design considerations are pad and stencil design. When it comes to bond pad design two approaches can be taken: solder mask defined (SMD) or non-solder mask defined (NSMD). A NSMD approach typically leads to more reliable joints, since the

solder Solder (; North American English, NA: ) is a fusible alloy, fusible metal alloy used to create a permanent bond between metal workpieces. Solder is melted in order to wet the parts of the joint, where it adheres to and connects the pieces aft ...

is able to bond to both the top and sides of the copper pad. The copper etching process also generally has tighter control than the solder masking process, resulting in more consistent joints. This does have the potential to affect the thermal and electrical performance of the joints, so it can be helpful to consult the package manufacturer for optimal performance parameters. SMD pads can be used to reduce the chances of solder bridging, however this may affect overall reliability of the joints. Stencil design is another key parameter in QFN design process. Proper aperture design and stencil thickness can help produce more consistent joints (i.e. minimal voiding, outgassing, and floating parts) with proper thickness, leading to improved reliability. There are also issues on the manufacturing side. For larger QFN components, moisture absorption during solder reflow can be a concern. If there is a large amount of moisture absorption into the package then heating during reflow can lead to excessive component warpage. This often results in the corners of the component lifting off the

, causing improper joint formation. To reduce the risk of warpage issues during reflow a

moisture sensitivity level Moisture sensitivity level (MSL) relates to the packaging and handling precautions for some semiconductors and is a rating that shows a device's susceptibility to damage due to absorbed moisture when subjected to reflow soldering as defined in J- ...

of 3 or higher is recommended.http://www.dfrsolutions.com/hubfs/Resources/services/The-Reliability-Challenges-of-QFN-Packaging.pdf?t=1502980151115 Several other issues with QFN manufacturing include: part floating due to excessive solder paste under the center thermal pad, large solder voiding, poor reworkable characteristics, and optimization of the solder reflow profile.

Reliability

Component packaging is often driven by the consumer electronics market with less consideration given to higher reliability industries such as automotive and aviation. It can therefore be challenging to integrate component package families, such as the QFN, into high reliability environments. QFN components are known to be susceptible to

solder fatigue Solder fatigue is the mechanical degradation of solder due to deformation under cyclic loading. This can often occur at stress levels below the yield stress of solder as a result of repeated temperature fluctuations, mechanical vibrations, or me ...

issues, especially thermomechanical fatigue due to thermal cycling. The significantly lower standoff in QFN packages can lead to higher thermomechanical strains due to

coefficient of thermal expansion Thermal expansion is the tendency of matter to increase in length, area, or volume, changing its size and density, in response to an increase in temperature (usually excluding phase transitions). Substances usually contract with decreasing temp ...

(CTE) mismatch as compared to leaded packages. For example, under accelerated thermal cycling conditions between -40 °C to 125 °C, various

quad flat package A quad flat package (QFP) is a surface-mounted integrated circuit package with "gull wing" leads extending from each of the four sides. Socketing such packages is rare and through-hole mounting is not possible. Versions ranging from 32 to 304 ...

(QFP) components can last over 10,000 thermal cycles whereas QFN components tend to fail at around 1,000-3,000 cycles. Historically, reliability testing has been mainly driven by

JEDEC The Joint Electron Device Engineering Council (JEDEC) Solid State Technology Association is a consortium of the semiconductor industry headquartered in Arlington County, Virginia, Arlington, United States. It has over 300 members and is focused ...

, however this has primarily focused on die and 1st level interconnects.

IPC IPC may refer to: Businesses and organizations Arts and media * Intellectual Property Committee, a coalition of US corporations with intellectual property interests * International Panorama Council, an international network of specialists in ...

-9071A attempted to address this by focusing on 2nd level interconnects (i.e. package to PCB substrate). The challenge with this standard is that it has been more adopted by OEMs than component manufacturers, who tend to view it as an application-specific issue. As a result there has been much experimental testing and

finite element analysis Finite element method (FEM) is a popular method for numerically solving differential equations arising in engineering and mathematical models, mathematical modeling. Typical problem areas of interest include the traditional fields of structural ...

across various QFN package variants to characterize their reliability and

behavior. Serebreni et al. proposed a semi-analytical model to assess the reliability QFN solder joints under thermal cycling. This model generates effective mechanical properties for the QFN package, and calculates the

shear stress Shear stress (often denoted by , Greek alphabet, Greek: tau) is the component of stress (physics), stress coplanar with a material cross section. It arises from the shear force, the component of force vector parallel to the material cross secti ...

and strain using a model proposed by Chen and Nelson.Chen, W. T., and C. W. Nelson. "Thermal stress in bonded joints." IBM Journal of Research and Development 23.2 (1979): 179-188. The dissipated strain energy density is then determined from these values and used to predict characteristic cycles to failure using a 2-parameter Weibull curve.

Comparison to other packages

The QFN package is similar to the

, but the leads do not extend out from the package sides. It is hence difficult to hand-solder a QFN package, inspect solder joint quality, or probe lead(s).

Variants

Different manufacturers use different names for this package: ML (micro-leadframe) versus FN (flat no-lead), in addition there are versions with pads on all four sides (quad) and pads on just two sides (dual), thickness varying between 0.9–1.0 mm for normal packages and 0.4 mm for extremely thin. Abbreviations include: Micro lead frame package (MLP) is a family of

QFN packages, used in surface mounted

electronic Electronic may refer to: *Electronics, the science of how to control electric energy in semiconductors * ''Electronics'' (magazine), a defunct American trade journal *Electronic storage, the storage of data using an electronic device *Electronic c ...

circuits designs. It is available in 3 versions which are MLPQ (Q stands for ''quad''), MLPM (M stands for ''micro''), and MLPD (D stands for ''dual''). These package generally have an exposed die attach pad to improve thermal performance. This package is similar to

chip scale package A chip scale package or chip-scale package (CSP) is a type of integrated circuit package. Originally, CSP was the acronym for ''chip-size packaging.'' Since only a few packages are chip size, the meaning of the acronym was adapted to ''chip-scal ...

s (CSP) in construction. MLPD are designed to provide a footprint-compatible replacement for small-outline integrated circuit (SOIC) packages. Micro lead frame (MLF) is a near CSP plastic encapsulated package with a copper leadframe substrate. This package uses perimeter lands on the bottom of the package to provide electrical contact to the

. The die attach paddle is exposed on the bottom of the package surface to provide an efficient heat path when soldered directly to the circuit board. This also enables stable ground by use of down bonds or by electrical connection through a conductive die attach material. A more recent design variation which allows for higher density connections is the ''dual row micro lead frame'' (DRMLF) package. This is an MLF package with two rows of lands for devices requiring up to 164 I/O. Typical applications include hard disk drives, USB controllers, and wireless LAN.

References

External links

Board mounting notes for QFN packages

MicroLeadFrame®
from Amkor Technology
Edge Protection Technology for QFN Packages
from Amkor Technology
ChipScale Review
magazine, July - August 2000.]
Linear Technology - QFN Package Users Guide
{{Semiconductor packages Chip carriers